SUPER MICRO Computer SUPER X5DLR-8G2+, SUPER X5DL8-GG user manual Bootblock Recovery Codes

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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual

B-2 Bootblock Recovery Codes

The bootblock recovery checkpoint codes are listed in order of execution:

Checkpoint

Code Description

E0h

The onboard floppy controller if available is initialized. Next,

 

beginning the base 512 KB memory test.

E1h

Initializing the interrupt vector table next.

E2h

Initializing the DMA and Interrupt controllers next.

E6h

Enabling the floppy drive controller and Timer IRQs. Enabling internal

 

cache memory.

Edh

Initializing the floppy drive.

Eeh

Looking for a floppy diskette in drive A:. Reading the first sector of

 

the diskette.

Efh

A read error occurred while reading the floppy drive in drive A:.

F0h

Next, searching for the AMIBOOT.ROM file in the root directory.

F1h

The AMIBOOT.ROM file is not in the root directory.

F2h

Next, reading and analyzing the floppy diskette FAT to find the

 

clusters occupied by the AMIBOOT.ROM file.

F3h

Next, reading the AMIBOOT.ROM file, cluster by cluster.

F4h

The AMIBOOT.ROM file is not the correct size.

F5h

Next, disabling internal cache memory.

FBh

Next, detecting the type of flash ROM.

FCh

Next, erasing the flash ROM.

FDh

Next, programming the flash ROM.

FFh

Flash ROM programming was successful. Next, restarting the

 

system BIOS.

B-3 Uncompressed Initialization Codes

The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM.

Checkpoint

Code Description

03h

The NMI is disabled. Next, checking for a soft reset or a power on

 

condition.

05h

The BIOS stack has been built. Next, disabling cache memory.

06h

Uncompressing the POST code next.

07h

Next, initializing the CPU and the CPU data area.

08h

The CMOS checksum calculation is done next.

0Ah

The CMOS checksum calculation is done. Initializing the CMOS status

 

register for date and time next.

0Bh

The CMOS status register is initialized. Next, performing any required

B-2

Image 84
Contents Super Page Preface About This Manual Manual OrganizationTable of Contents Table of Contents Troubleshooting AmibiosAppendices Checklist OverviewContacting Supermicro HeadquartersEurope Asia-PacificIntroduction Super X5DL8-GG Image Super X5DLR-8G2 Image Super X5DL8-GG Jumper Description Default Setting Connector DescriptionX5DL8-GG Quick Reference Super X5DLR-8G2 X5DLR-8G2+/X5DLR-8G2 Quick Reference Motherboard Features CPUCD/Diskette Utilities ServerWorks Grand Champion LE Chipset System Block Diagram Special Features Bios RecoveryRecovery from AC Power Loss Chipset OverviewEnvironmental Temperature Control CPU Fan Auto-Off in Sleep ModePC Health Monitoring Fan Status Monitor with Firmware/Software On/Off ControlAcpi Features Hardware Bios Virus ProtectionAuto-Switching Voltage Regulator for the CPU Core System Resource AlertSlow Blinking LED for Suspend-State Indicator Main Switch Override MechanismMicrosoft OnNow External Modem Ring-OnPower Supply Super I/OPage Precautions Static-Sensitive DevicesUnpacking PGA Processor and Heatsink Installation Lift the the lever completely or you PGA604 Socket Empty and with Processor Installed Mounting the Motherboard in the ChassisInstalling DIMMs Dimm Installation See FigureIOPorts/Control Panel Connectors To InstallJF1/JF2 Header Pins Front Control PanelConnecting Cables ATX Power ConnectorProcessor Power Connector Power LEDHDD LED Overheat LED OHPower Fail LED ResetUniversal Serial Bus USB0/1 Serial Ports PS/2 Keyboard and Mouse PortsFan Headers GLAN1/GLAN2 Ethernet PortsHD LED Indicator JF2 Power LED JF2Third Power Supply Fail Header Speaker X5DL8-GGWake-On-LAN X5DL8-GG Chassis IntrusionExtra Universal Serial Bus Headers USB2/3 Onboard Indicators GLAN1/GLAN2 LEDsDebug LEDs DIP Switch Settings DIP Switch Processor SpeedJumper Settings SpeakerEnable/Disable X5DL8-GGExplanation Jumpers Cmos ClearSpeakerEnable/Disable X5DLR-8G2+, X5DLR-8G2 Fan Detection SelectChassis/Overheat Fan Select Watch DogGLAN1 Enable/Disable X5DL8-GG GLAN2 Enable/Disable X5DL8-GGScsi Enable/Disable Scsi Termination Enable/ DisablePCI-X Bus Speed Setting X5DL8-GG PCI-X Bus Speed Setting X5DLR-8G2+, X5DLR-8G2MHz PCI Enable/Disable X5DL8-GG PCI 3.3V Standby Enable/ Disable X5DL8-GG VGA Enable/DisableFront Side Bus Speed Spread SpectrumMain Power Override X5DL8-GG Parallel Port ConnectorParallel Port, Floppy/Hard Disk Drive and Scsi Connections Floppy Connector IDE ConnectorsUltra320 Scsi Connector Pin Ultra320 Scsi Connectors JA1 and JA2Installing Software Drivers Driver/Tool Installation Display ScreenTroubleshooting Procedures Before Power OnNo Power No VideoTechnical Support Procedures Memory ErrorsLosing the System’s Setup Configuration Frequently Asked Questions Question How do I update my BIOS?Question Whats on the CD that came with my motherboard? Returning Merchandise for Service Super X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual System Bios How To Change the Configuration DataStarting the Setup Utility IntroductionBios Features Running SetupMain Bios Setup Menu Bios Setup UtilityAdvanced Bios Setup Bios Setup UtilitySuper IO Configuration Serial Port 1 AddressSerial Port 1 IRQ Serial Port 2 AddressIDE Configuration LBA/Large Mode Block Multi-Sector Transfer ModePrimary IDE Master TypePIO Mode DMA ModeA.R.T 32Bit Data TransferAtapi Detect Timeout Seconds Primary IDE SlaveSecondary IDE Master Secondary IDE SlaveFloppy Configuration Boot Settings ConfigurationBootUp Num Lock BootUp CPU SpeedBoot to OS/2 PS/2 Mouse SupportWait for F1 if Error System Bios CacheableHit Delete Message Display CacheEvent Log Configuration Peripheral Device Configuration Remote Access ConfigurationSystem Health Monitor Chipset Setup Memory Timing ControlSdram CAS Latency MPS 1.4 SupportPCI PnP Setup Auto DQS Setting SupportWatchdog Timer Hyper-threadingReset Configuration Data Plug & Play OSAllocate IRQ to VGA PCI IDE BusMasterPower Setup Bios Setup UtilityPower Management Acpi Aware O/SBoot Setup Boot Device Priority1st Boot Device 2nd Boot Device3rd Boot Device 4th Boot Device5th Boot Device Hard Disk DrivesSecurity Setup Supervisor Password User PasswordChange Supervisor Password Change User PasswordClear User Password Boot Sector Virus ProtectionExit Setup Exit Saving ChangesExit Discarding Changes Load Optimal Defaults Load Failsafe DefaultsDiscard Changes Super X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Amibios Error Beep Codes Beep Code Error Message DescriptionSuper X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Appendix B Bios Post Checkpoint Codes Uncompressed Initialization CodesBootblock Recovery Codes Initialization before the keyboard BAT command is issued Monochrome mode and color mode settings next 48h 60h 95h Super X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual