SUPER MICRO Computer SUPER X5DL8-GG, SUPER X5DLR-8G2+ user manual 95h

Page 89

 

Appendix B: BIOS POST Checkpoint Codes

 

 

Checkpoint

Code Description

95h

Initializing the bus option ROMs from C800 next. See the last page of

 

this chapter for additional information.

96h

Initializing before passing control to the adaptor ROM at C800.

97h

Initialization before the C800 adaptor ROM gains control has com-

 

pleted. The adaptor ROM check is next.

98h

The adaptor ROM had control and has now returned control to BIOS

 

POST. Performing any required processing after the option ROM

 

returned control.

99h

Any initialization required after the option ROM test has completed.

 

Configuring the timer data area and printer base address next.

9Ah

Set the timer and printer base addresses. Setting the RS-232 base

 

address next.

9Bh

Returned after setting the RS-232 base address. Performing any

 

required initialization before the Coprocessor test next.

9Ch

Required initialization before the Coprocessor test is over. Initializing

 

the Coprocessor next.

9Dh

Coprocessor initialized. Performing any required initialization after

 

the Coprocessor test next.

9Eh

Initialization after the Coprocessor test is complete. Checking the

 

extended keyboard, keyboard ID, and Num Lock key next. Issuing the

 

keyboard ID command next.

A2h

Displaying any soft errors next.

A3h

The soft error display has completed. Setting the keyboard typematic

 

rate next.

A4h

The keyboard typematic rate is set. Programming the memory wait

 

states next.

A5h

Memory wait state programming is over. Clearing the screen and

 

enabling parity and the NMI next.

A7h

NMI and parity enabled. Performing any initialization required before

 

passing control to the adaptor ROM at E000 next.

A8h

Initialization before passing control to the adaptor ROM at E000h

 

completed. Passing control to the adaptor ROM at E000h next.

A9h

Returned from adaptor ROM at E000h control. Performing any

 

initialization required after the E000 option ROM had control next.

Aah

Initialization after E000 option ROM control has completed. Displaying

 

the system configuration next.

Abh

Uncompressing the DMI data and executing DMI POST initialization

 

next.

B0h

The system configuration is displayed.

B1h

Copying any code to specific areas.

00h

Code copying to specific areas is done. Passing control to INT 19h

 

boot loader next.

B-7

Image 89
Contents Super Page About This Manual Manual Organization PrefaceTable of Contents Table of Contents Appendices TroubleshootingAmibios Overview ChecklistHeadquarters Contacting SupermicroEurope Asia-PacificIntroduction Super X5DL8-GG Image Super X5DLR-8G2 Image Super X5DL8-GG X5DL8-GG Quick Reference Jumper Description Default SettingConnector Description Super X5DLR-8G2 X5DLR-8G2+/X5DLR-8G2 Quick Reference CPU Motherboard FeaturesCD/Diskette Utilities ServerWorks Grand Champion LE Chipset System Block Diagram Bios Recovery Special FeaturesRecovery from AC Power Loss Chipset OverviewCPU Fan Auto-Off in Sleep Mode Environmental Temperature ControlPC Health Monitoring Fan Status Monitor with Firmware/Software On/Off ControlHardware Bios Virus Protection Acpi FeaturesAuto-Switching Voltage Regulator for the CPU Core System Resource AlertMain Switch Override Mechanism Slow Blinking LED for Suspend-State IndicatorMicrosoft OnNow External Modem Ring-OnSuper I/O Power SupplyPage Unpacking PrecautionsStatic-Sensitive Devices PGA Processor and Heatsink Installation Lift the the lever completely or you Mounting the Motherboard in the Chassis PGA604 Socket Empty and with Processor InstalledDimm Installation See Figure Installing DIMMsTo Install IOPorts/Control Panel ConnectorsFront Control Panel JF1/JF2 Header PinsATX Power Connector Connecting CablesProcessor Power Connector Power LEDOverheat LED OH HDD LEDUniversal Serial Bus USB0/1 Power Fail LEDReset PS/2 Keyboard and Mouse Ports Serial PortsFan Headers GLAN1/GLAN2 Ethernet PortsPower LED JF2 HD LED Indicator JF2Third Power Supply Fail Header Speaker X5DL8-GGExtra Universal Serial Bus Headers USB2/3 Wake-On-LAN X5DL8-GGChassis Intrusion Debug LEDs Onboard IndicatorsGLAN1/GLAN2 LEDs DIP Switch Processor Speed DIP Switch SettingsSpeakerEnable/Disable X5DL8-GG Jumper SettingsExplanation Jumpers Cmos ClearFan Detection Select SpeakerEnable/Disable X5DLR-8G2+, X5DLR-8G2Chassis/Overheat Fan Select Watch DogGLAN2 Enable/Disable X5DL8-GG GLAN1 Enable/Disable X5DL8-GGScsi Enable/Disable Scsi Termination Enable/ DisableMHz PCI Enable/Disable X5DL8-GG PCI-X Bus Speed Setting X5DL8-GGPCI-X Bus Speed Setting X5DLR-8G2+, X5DLR-8G2 VGA Enable/Disable PCI 3.3V Standby Enable/ Disable X5DL8-GGFront Side Bus Speed Spread SpectrumParallel Port, Floppy/Hard Disk Drive and Scsi Connections Main Power Override X5DL8-GGParallel Port Connector IDE Connectors Floppy ConnectorPin Ultra320 Scsi Connectors JA1 and JA2 Ultra320 Scsi ConnectorDriver/Tool Installation Display Screen Installing Software DriversBefore Power On Troubleshooting ProceduresNo Power No VideoLosing the System’s Setup Configuration Technical Support ProceduresMemory Errors Question How do I update my BIOS? Frequently Asked QuestionsQuestion Whats on the CD that came with my motherboard? Returning Merchandise for Service Super X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual How To Change the Configuration Data System BiosStarting the Setup Utility IntroductionRunning Setup Bios FeaturesBios Setup Utility Main Bios Setup MenuBios Setup Utility Advanced Bios SetupSerial Port 1 Address Super IO ConfigurationSerial Port 1 IRQ Serial Port 2 AddressIDE Configuration Block Multi-Sector Transfer Mode LBA/Large ModePrimary IDE Master TypeDMA Mode PIO ModeA.R.T 32Bit Data TransferPrimary IDE Slave Atapi Detect Timeout SecondsSecondary IDE Master Secondary IDE SlaveBoot Settings Configuration Floppy ConfigurationBootUp CPU Speed BootUp Num LockBoot to OS/2 PS/2 Mouse SupportSystem Bios Cacheable Wait for F1 if ErrorHit Delete Message Display CacheEvent Log Configuration System Health Monitor Peripheral Device ConfigurationRemote Access Configuration Memory Timing Control Chipset SetupSdram CAS Latency MPS 1.4 SupportAuto DQS Setting Support PCI PnP SetupWatchdog Timer Hyper-threadingPlug & Play OS Reset Configuration DataAllocate IRQ to VGA PCI IDE BusMasterBios Setup Utility Power SetupAcpi Aware O/S Power ManagementBoot Device Priority Boot Setup1st Boot Device 2nd Boot Device4th Boot Device 3rd Boot Device5th Boot Device Hard Disk DrivesSupervisor Password User Password Security SetupChange User Password Change Supervisor PasswordClear User Password Boot Sector Virus ProtectionExit Discarding Changes Exit SetupExit Saving Changes Discard Changes Load Optimal DefaultsLoad Failsafe Defaults Super X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Beep Code Error Message Description Amibios Error Beep CodesSuper X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual Uncompressed Initialization Codes Appendix B Bios Post Checkpoint CodesBootblock Recovery Codes Initialization before the keyboard BAT command is issued Monochrome mode and color mode settings next 48h 60h 95h Super X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual