Omega Engineering PCI-DAS1200 manual Differential Input

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			CH IN		+
~					+
	V s	Vs + V g2 - V g1			Inp ut		To A /D
	V s	Vs + V g2 - V g1			A m p		To A /D
			LL GN D		-
			LL GN D

g1

g 2

An y volta ge differential betw een grounds g1 and g2 show s up as an error signal at the input am plifier

S in gle -ended input w ith C om m on M ode Voltage

Differential Inputs

Differential inputs measure the voltage between two distinct input signals. Within a certain range (referred to as the common mode range), the measurement is almost independent of signal source to PCI-DAS1200 ground variations. A differential input is also much more immune to EMI than a single-ended one. Most EMI noise induced in one lead is also induced in the other, the input measures only the difference between the two leads, and the EMI common to both is ignored. This effect is a major reason for twisted pair wire because the twisting ensures that both wires are subject to virtually identical external influence. The diagram below shows a typical differential input configuration.

CH High

CH Low

LL GN D

I/O

Connector

+

Inp ut		To A /D
A m p		To A /D
A m p

-

Differential Input

~	CH High
	Vs

+

Inp ut

Vs

CH Low

Vcm

LL GND

A m p

-

To A/D

g1	Vcm = Vg2 - Vg1
	g 2

Common Mode Voltage (Vcm) is ignored by differential input configuration. However, note that Vcm + Vs must remain within

the am plifier’s comm on mode range of ±10V

Diffe rential Inp ut

9

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Contents Users Guide Table of Contents Table of Contents ORFN3&,$LDJUDP6 %ORFN$LDJUDP6-5 Installation Windows 95, 98 & NTUsing InstaCal DOS AND/OR Windows Testing the Installation Connector PIN Diagram Hardware ConnectionsAnalog Connections Differential Input System Grounds and Isolation Which system do you have?Systems with Common Mode ground offset Voltages Systems with Common GroundsWiring Configurations Small Common Mode VoltagesLarge Common Mode Voltages PCI-DAS1200 and signal source already have isolated grounds Common Ground / Single-Ended InputsCommon Mode Voltage +/-10V / Single-Ended Inputs Common Mode Voltage +/-10VBoard Programming & Applications Programming LanguagesSelf-Calibration of the PCI-DAS1200 Alo g O u t BADR0 BADR1Interrupt / ADC Fifo Register Region Function OperationsInte EoaieEoacl IntclADC Channel MUX and Control Register Input Range Input Gain Measurement Resolution EOCTrigger CONTROL/STATUS Register Pacer SourceTS10 TgenFifo Mode Sample CTR ARMC0SRC XtrigCalibration Register DAC Channel Cal FunctionCal Source Dacen Mode CalenSDI DACnR10BADR2 ADC Data RegisterBADR2 + ADC Fifo Clear RegisterBADR3 ADC Pacer Clock Data and Control Registers8254A Counter 0 Data ADC Post Trigger Conversion Counter BADR3 +8254A Counter 2 Data ADC Pacer Divider Upper Base +ADC 8254 Control Register Digital I/O Data and Control RegistersDIO Port B Data DIO Port C DataDIO Control Register Index and User Counter Data and Control Registers 8254B Counter DATA-ADCPRE-TRIGGER Index Counter Or User8254B Counter 1 Data User Counter #5 8254B Counter 2 Data User Counter #6BADR3 + Ah 8254B Control RegisterBADR4 1 DAC0 Data Register2 DAC1 Data Register Electrical Specifications Analog Input SectionAnalog Output Parallel Digital Input / OutputCounter Section 82C54AOther Specifications Power consumptionEnvironmental For Your Notes EC Declaration of Conformity