Cypress CY7C1356C manual Partial Write Cycle Description2, 3, 4, Sleep Mode, Function CY7C1354C

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CY7C1354C

CY7C1356C

Truth Table[2, 3, 4, 5, 6, 7, 8]

 

Address

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Operation

Used

 

CE

 

ZZ

 

ADV/LD

 

WE

 

 

BWx

 

 

OE

 

 

CEN

 

CLK

DQ

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NOP/WRITE ABORT (Begin Burst)

None

 

L

 

L

 

L

 

L

 

H

 

X

 

 

L

L-H

Tri-State

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WRITE ABORT (Continue Burst)

Next

 

X

 

L

 

H

 

X

 

H

 

X

 

 

L

L-H

Tri-State

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IGNORE CLOCK EDGE (Stall)

Current

 

X

 

L

 

X

 

X

 

X

 

X

 

 

H

L-H

-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SLEEP MODE

None

 

X

 

H

 

X

 

X

 

X

 

X

 

 

X

X

Tri-State

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Partial Write Cycle Description[2, 3, 4, 9]

Function (CY7C1354C)

 

 

 

 

 

d

 

 

c

 

 

b

 

 

a

 

WE

 

 

BW

 

BW

 

BW

 

BW

Read

 

H

 

 

X

 

X

 

X

 

X

 

 

 

 

 

 

 

 

 

 

 

 

Write –No bytes written

 

L

 

 

H

 

H

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

 

Write Byte a – (DQa and DQPa)

 

L

 

 

H

 

H

 

H

 

L

Write Byte b – (DQb and DQPb)

 

L

 

 

H

 

H

 

L

 

H

Write Bytes b, a

 

L

 

 

H

 

H

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

 

Write Byte c – (DQc and DQPc)

 

L

 

 

H

 

L

 

H

 

H

Write Bytes c, a

 

L

 

 

H

 

L

 

H

 

L

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes c, b

 

L

 

 

H

 

L

 

L

 

H

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes c, b, a

 

L

 

 

H

 

L

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

 

Write Byte d – (DQd and DQPd)

 

L

 

 

L

 

H

 

H

 

H

Write Bytes d, a

 

L

 

 

L

 

H

 

H

 

L

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes d, b

 

L

 

 

L

 

H

 

L

 

H

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes d, b, a

 

L

 

 

L

 

H

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes d, c

 

L

 

 

L

 

L

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes d, c, a

 

L

 

 

L

 

L

 

H

 

L

 

 

 

 

 

 

 

 

 

 

 

 

Write Bytes d, c, b

 

L

 

 

L

 

L

 

L

 

H

 

 

 

 

 

 

 

 

 

 

 

 

Write All Bytes

 

L

 

 

L

 

L

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Partial Write Cycle Description[2, 3, 4, 9]

Function (CY7C1356C)

 

 

 

 

 

b

 

 

a

 

WE

 

 

BW

 

BW

Read

 

H

 

 

x

 

x

Write – No Bytes Written

 

L

 

 

H

 

H

Write Byte a (DQa and DQPa)

 

L

 

 

H

 

L

Write Byte b – (DQb and DQPb)

 

L

 

 

L

 

H

Write Both Bytes

 

L

 

 

L

 

L

Note:

9. Table only lists a partial listing of the byte write combinations. Any combination of BWX is valid. Appropriate write will be done based on which byte write is active.

Document #: 38-05538 Rev. *G

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Contents Logic Block Diagram-CY7C1354C 256K x FeaturesFunctional Description1 Cypress Semiconductor CorporationMaximum Access Time Maximum Operating Current Logic Block Diagram-CY7C1356C 512K xSelection Guide 250 MHz 200 MHz 166 MHz Unit512K × Pin Configurations Pin Tqfp PinoutPin Configurations Ball BGA Pinout CY7C1354C 256K ×CY7C1356C 512K x CY7C1356C 512K × Pin Configurations Ball Fbga PinoutPin Definitions Burst Read Accesses Single Read AccessesSingle Write Accesses Functional OverviewInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Partial Write Cycle Description2, 3, 4 Sleep ModeFunction CY7C1354C Function CY7C1356CTAP Controller Block Diagram TAP Controller State DiagramIeee 1149.1 Serial Boundary Scan Jtag TAP Instruction Set Bypass RegisterParameter Description Min Max Unit Clock TAP TimingOutput Times Set-up Times3V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Identification Register DefinitionsIdentification Codes Scan Register SizesRegister Name Bit Size Instruction Code DescriptionBit # Ball ID Boundary Scan Exit Order 256K ×B10 Boundary Scan Exit Order 512K ×J10 K10Maximum Ratings Electrical Characteristics Over the Operating Range14Operating Range Ambient RangeThermal Resistance Capacitance16AC Test Loads and Waveforms 3V I/O Test Load250 200 166 Parameter Description Unit Min Max Switching Characteristics Over the Operating Range 18Data ADV/LD BWXOut DQ A6 A7NOP,STALL and Deselect Cycles23, 24 Switching WaveformsDON’T Care ZZ Mode Timing27Ordering Information CY7C1354C CY7C1356C Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package Diagrams90±0.05 Ball BGA 14 x 22 x 2.4 mmSoldernotespad Type NON-SOLDER Mask Defined Nsmd Document History ECN No Issue Date Orig. Description of Change