Cypress CY7C1354C manual Pin Configurations Ball Fbga Pinout, CY7C1356C 512K ×

Page 5

CY7C1354C

CY7C1356C

Pin Configurations (continued)

165-Ball FBGA Pinout

CY7C1354C (256K × 36)

1

2

3

4

5

6

7

8

9

10

11

A

NC/576M

A

A

A

NC

CE

1

BW

c

BW

b

CE

3

CEN

ADV/LD

B

NC/1G

A

CE2

d

a

CLK

NC/18M

A

NC

BW

BW

WE

OE

C

DQPc

NC

VDDQ

VSS

VSS

VSS

VSS

VSS

VDDQ

NC

DQPb

D

DQc

DQc

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQb

DQb

E

DQc

DQc

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQb

DQb

F

DQc

DQc

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQb

DQb

G

DQc

DQc

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQb

DQb

H

NC

NC

NC

VDD

VSS

VSS

VSS

VDD

NC

NC

ZZ

J

DQd

DQd

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

DQa

K

DQd

DQd

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

DQa

L

DQd

DQd

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

DQa

M

DQd

DQd

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

DQa

N

DQPd

NC

VDDQ

VSS

NC

NC

NC

VSS

VDDQ

NC

DQPa

P

NC/144M

NC/72M

A

A

TDI

A1

TDO

A

A

A

NC/288M

R

MODE

NC/36M

A

A

TMS

A0

TCK

A

A

A

A

CY7C1356C (512K × 18)

1

2

3

4

5

6

7

8

9

10

11

A

NC/576M

A

NC

A

A

A

CE

1

BW

b

CE

3

CEN

ADV/LD

B

NC/1G

A

CE2

NC

CLK

NC/18M

A

NC

BW

a

WE

OE

C

NC

NC

VDDQ

VSS

VSS

VSS

VSS

VSS

VDDQ

NC

DQPa

D

NC

DQb

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQa

E

NC

DQb

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQa

F

NC

DQb

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQa

G

NC

DQb

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

NC

DQa

H

NC

NC

NC

VDD

VSS

VSS

VSS

VDD

NC

NC

ZZ

J

DQb

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

NC

K

DQb

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

NC

L

DQb

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

NC

M

DQb

NC

VDDQ

VDD

VSS

VSS

VSS

VDD

VDDQ

DQa

NC

N

DQPb

NC

VDDQ

VSS

NC

NC

NC

VSS

VDDQ

NC

NC

P

NC/144M

NC/72M

A

A

TDI

A1

TDO

A

A

A

NC/288M

R

MODE

NC/36M

A

A

TMS

A0

TCK

A

A

A

A

Document #: 38-05538 Rev. *G

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Contents Logic Block Diagram-CY7C1354C 256K x FeaturesFunctional Description1 Cypress Semiconductor CorporationMaximum Access Time Maximum Operating Current Logic Block Diagram-CY7C1356C 512K xSelection Guide 250 MHz 200 MHz 166 MHz Unit512K × Pin Configurations Pin Tqfp PinoutCY7C1356C 512K x Pin Configurations Ball BGA PinoutCY7C1354C 256K × CY7C1356C 512K × Pin Configurations Ball Fbga PinoutPin Definitions Burst Read Accesses Single Read AccessesSingle Write Accesses Functional OverviewZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Partial Write Cycle Description2, 3, 4 Sleep ModeFunction CY7C1354C Function CY7C1356CIeee 1149.1 Serial Boundary Scan Jtag TAP Controller Block DiagramTAP Controller State Diagram TAP Instruction Set Bypass RegisterParameter Description Min Max Unit Clock TAP TimingOutput Times Set-up Times3V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Identification Register DefinitionsIdentification Codes Scan Register SizesRegister Name Bit Size Instruction Code DescriptionBit # Ball ID Boundary Scan Exit Order 256K ×B10 Boundary Scan Exit Order 512K ×J10 K10Maximum Ratings Electrical Characteristics Over the Operating Range14Operating Range Ambient RangeThermal Resistance Capacitance16AC Test Loads and Waveforms 3V I/O Test Load250 200 166 Parameter Description Unit Min Max Switching Characteristics Over the Operating Range 18Data ADV/LD BWXOut DQ A6 A7NOP,STALL and Deselect Cycles23, 24 Switching WaveformsDON’T Care ZZ Mode Timing27Ordering Information CY7C1354C CY7C1356C Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package Diagrams90±0.05 Ball BGA 14 x 22 x 2.4 mmSoldernotespad Type NON-SOLDER Mask Defined Nsmd Document History ECN No Issue Date Orig. Description of Change