Cypress CY7C1380C, CY7C1382C manual Package Diagrams

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CY7C1380C

CY7C1382C

Package Diagrams (continued)

165-Ball FBGA (13 x 15 x 1.2 mm) BB165A

51-85122-*C

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Document #: 38-05237 Rev. *D

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Contents 250 MHz 225 MHz 200 MHz 167 MHz 133 MHz Unit FeaturesFunctional Description1 Selection GuideLogic Block Diagram CY7C1382C 1M x Logic Block Diagram CY7C1380C 512K xCY7C1382C 1M x Pin ConfigurationsCY7C1380C 512K X CY7C1382C 512K x NC / 72M NC / 36MNC / 72M NC / 288MTqfp BGA CY7C1380C-Pin DefinitionsAddress Strobe from Controller, sampled on Power supply inputs to the core of the deAddress Strobe from Processor, sampled On the rising edge of CLK, active LOW. WhenSerial data-out to the Jtag circuit . Delivers Power supply for the I/O circuitrySelects Burst Order . When tied to GND Ground for the I/O circuitryCY7C1382CPin Definitions Address Strobe from Processor, sampled on Rising edge of CLK, active LOW . When assertedZZ sleep Input, active High . When asserted Power supply inputs to the core of the deviceSerial data-out to the Jtag circuit . Delivers data Functional Overview Single Read AccessesCE2 Adsp Adsc ADV Write CLK Interleaved Burst Address Table Mode = Floating or VDDZZ Mode Electrical Characteristics AddressBWE Truth Table for Read/Write5CLK Adsp Adsc ADV Write Function CY7C1380CIeee 1149.1 Serial Boundary Scan Jtag TAP Controller Block Diagram TAP Controller State DiagramTAP Instruction Set Bypass RegisterBoundary Scan Register Identification ID RegisterTAP Timing TAP AC Switching Characteristics Over the operating Range9Parameter Description Test Conditions MIN MAX Units 3V TAP AC Test Conditions5V TAP AC Output Load Equivalent Identification Codes Identification Register DefinitionsScan Register Sizes Ball BGA Boundary Scan Order CY7C1380C 512K x Ball BGA Boundary Scan Order CY7C1382C 1M x J10 Ball fBGA Boundary Scan Order CY7C1380C 512K xA10 F10 G10Ball fBGA Boundary Scan Order CY7C1382C 1M x Ambient Range Electrical Characteristics Over the Operating Range12Maximum Ratings Operating RangeFBGA Unit Thermal Resistance14Capacitance Parameter Description Test Conditions5V I/O Test Load AC Test Loads and Waveforms3V I/O Test Load Min Max Unit Switching Characteristics Over the Operating Range19Read Cycle Timing21 Switching WaveformsWrite Cycle Timing21 CLZ Read/Write Cycle Timing21, 23ZZ Mode Timing 25 CY7C1382C-167AI CY7C1380C-167BGI Ordering InformationCY7C1382C-250AC CY7C1380C-250BGC Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101 Package DiagramsLead Pbga 14 x 22 x 2.4 mm BG119 Package Diagrams REV ECN no Issue Date Orig. Description of ChangeDocument History