CY7C1480V25
CY7C1482V25
CY7C1486V25
Switching Waveforms (continued)
Read/Write Cycle Timing[21, 23, 24]
tCYC
CLK
tCH tCL
tADS tADH
ADSP
ADSC
tAS tAH
ADDRESS | A1 | A2 |
BWE, BWX
tCES tCEH
CE
ADV
OE
|
|
| tCO |
Data In (D) | t | tOEHZ | |
|
| ||
|
| CLZ |
|
Data Out (Q) | Q(A1) | Q(A2) | |
|
| READs |
A3A4
tWES tWEH
tDS tDH
| tOELZ |
|
|
|
D(A3) |
|
|
|
|
| Q(A4) | Q(A4+1) | Q(A4+2) | Q(A4+3) |
Single WRITE |
| BURST READ |
|
|
DON’T CARE | UNDEFINED |
|
|
|
A5A6
D(A5) D(A6)
WRITEs
Notes
23.The data bus (Q) remains in
24.GW is HIGH.
Document #: | Page 24 of 32 |
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