Cypress CY7C1486V25, CY7C1480V25, CY7C1482V25 manual 250

Page 27

CY7C1480V25

CY7C1482V25

CY7C1486V25

Ordering Information (continued)

Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or

visit www.cypress.com for actual products offered.

Speed

 

Package

Part and Package Type

Operating

(MHz)

Ordering Code

Diagram

Range

 

 

 

 

 

 

250

CY7C1480V25-250AXC

51-85050

100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Commercial

 

 

 

 

 

 

CY7C1482V25-250AXC

 

 

 

 

 

 

 

 

 

CY7C1480V25-250BZC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1482V25-250BZC

 

 

 

 

 

 

 

 

 

CY7C1480V25-250BZXC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1482V25-250BZXC

 

 

 

 

 

 

 

 

 

CY7C1486V25-250BGC

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1486V25-250BGXC

 

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1480V25-250AXI

51-85050

100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Industrial

 

 

 

 

 

 

CY7C1482V25-250AXI

 

 

 

 

 

 

 

 

 

CY7C1480V25-250BZI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1482V25-250BZI

 

 

 

 

 

 

 

 

 

CY7C1480V25-250BZXI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1482V25-250BZXI

 

 

 

 

 

 

 

 

 

CY7C1486V25-250BGI

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1486V25-250BGXI

 

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Lead-Free

 

 

 

 

 

 

Document #: 38-05282 Rev. *H

Page 27 of 32

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Contents 250 MHz 200 MHz 167 MHz Unit FeaturesFunctional Description1 Selection GuideLogic Block Diagram CY7C1482V25 4M x Logic Block Diagram CY7C1480V25 2M xCLR Logic Block Diagram CY7C1486V25 1M xPin Configurations Pin Tqfp Pinout CY7C1480V25 2M xCY7C1482V25 4M x CY7C1482V25 4M x DQP F DQP B DQ C DQ G DQ BDQ G DQ B DQP G DQP CPin Definitions TDI Single Read AccessesSingle Write Accesses Initiated by Adsp Functional OverviewInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Operation Add. Used Truth TableFunction Truth Table for Read/WriteTAP Controller State Diagram TAP Controller Block DiagramIeee 1149.1 Serial Boundary Scan Jtag TAP Instruction Set Instruction RegisterOutput Times TAP AC Switching Characteristics Over the Operating Range9TAP Timing Parameter Description Min Max Unit ClockParameter Description Test Conditions Min TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions 8V TAP AC Test ConditionsScan Register Sizes Identification CodesBoundary Scan Exit Order 2M x M10 Boundary Scan Exit Order 4M xA11 A10 P10Boundary Scan Exit Order 1M x Range Ambient Electrical Characteristics Over the Operating Range12Maximum Ratings Operating RangeCapacitance14 Thermal Resistance14AC Test Loads and Waveforms Switching Characteristics Over the Operating Range15 Setup TimesParameter Description 250 MHz 200 MHz 167 MHz Unit Min Max Read Cycle Timing21 Switching WaveformsWrite Cycle Timing21 Read/Write Cycle Timing21, 23 DON’T Care ZZ Mode Timing25Ordering Information 250 Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Issue Date Orig. Description of Change Document HistoryDocument Number VKN/KKVTMP