Cypress CY7C1486V25, CY7C1480V25, CY7C1482V25 manual Ball Fbga 14 x 22 x 1.76 mm

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CY7C1480V25

CY7C1482V25

CY7C1486V25

Package Diagrams (continued)

Figure 3. 209-Ball FBGA (14 x 22 x 1.76 mm), 51-85167

51-85167-**

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Document #: 38-05282 Rev. *H

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© Cypress Semiconductor Corporation, 2002-2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

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Contents Selection Guide FeaturesFunctional Description1 250 MHz 200 MHz 167 MHz UnitLogic Block Diagram CY7C1480V25 2M x Logic Block Diagram CY7C1482V25 4M xLogic Block Diagram CY7C1486V25 1M x CLRPin Configurations Pin Tqfp Pinout CY7C1480V25 2M xCY7C1482V25 4M x CY7C1482V25 4M x DQ B DQP G DQP C DQ G DQ BDQ G DQP F DQP B DQ CPin Definitions Functional Overview Single Read AccessesSingle Write Accesses Initiated by Adsp TDIInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Truth Table Operation Add. UsedTruth Table for Read/Write FunctionTAP Controller State Diagram TAP Controller Block DiagramIeee 1149.1 Serial Boundary Scan Jtag Instruction Register TAP Instruction SetParameter Description Min Max Unit Clock TAP AC Switching Characteristics Over the Operating Range9TAP Timing Output Times8V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Parameter Description Test Conditions MinScan Register Sizes Identification CodesBoundary Scan Exit Order 2M x P10 Boundary Scan Exit Order 4M xA11 A10 M10Boundary Scan Exit Order 1M x Operating Range Electrical Characteristics Over the Operating Range12Maximum Ratings Range AmbientCapacitance14 Thermal Resistance14AC Test Loads and Waveforms Switching Characteristics Over the Operating Range15 Setup TimesParameter Description 250 MHz 200 MHz 167 MHz Unit Min Max Switching Waveforms Read Cycle Timing21Write Cycle Timing21 Read/Write Cycle Timing21, 23 ZZ Mode Timing25 DON’T CareOrdering Information 250 Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Issue Date Orig. Description of Change Document HistoryDocument Number VKN/KKVTMP