Cypress CY7C1471V25, CY7C1473V25, CY7C1475V25 8V TAP AC Test Conditions, 5V TAP AC Test Conditions

Page 17

CY7C1471V25

CY7C1473V25

CY7C1475V25

1.8V TAP AC Test Conditions

Input pulse levels

0.2V to VDDQ – 0.2

Input rise and fall time

1 ns

Input timing reference levels

0.9V

Output reference levels

0.9V

Test load termination supply voltage

0.9V

2.5V TAP AC Test Conditions

Input pulse levels

VSS to 2.5V

Input rise and fall time

1 ns

Input timing reference levels

1.25V

Output reference levels

1.25V

Test load termination supply voltage

1.25V

1.8V TAP AC Output Load Equivalent

 

2.5V TAP AC Output Load Equivalent

 

 

 

 

 

 

 

0.9V

 

 

 

 

 

 

 

 

 

1.25V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20pF

 

 

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TAP DC Electrical Characteristics And Operating Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(0°C < T < +70°C; V

DD

= 2.375 to 2.625 unless otherwise noted)[12]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

Description

 

 

 

 

 

Test Conditions

 

Min.

 

Max.

 

Unit

VOH1

Output HIGH Voltage

 

IOH = –1.0 mA, VDDQ = 2.5V

 

2.0

 

 

 

 

 

 

 

 

 

 

 

V

VOH2

Output HIGH Voltage

 

IOH = –100 µA

 

VDDQ = 2.5V

 

2.1

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

1.6

 

 

 

 

 

 

 

 

 

 

 

V

VOL1

Output LOW Voltage

 

IOL = 1.0 mA

 

VDDQ = 2.5V

 

 

 

 

0.4

 

V

VOL2

Output LOW Voltage

 

IOL = 100 µA

 

VDDQ = 2.5V

 

 

 

 

0.2

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

 

 

 

0.2

 

V

VIH

Input HIGH Voltage

 

 

 

 

 

 

 

VDDQ = 2.5V

 

1.7

 

 

VDD + 0.3

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

1.26

 

 

VDD + 0.3

 

V

VIL

Input LOW Voltage

 

 

 

 

 

 

 

VDDQ = 2.5V

 

–0.3

 

0.7

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 1.8V

 

–0.3

 

0.36

 

V

IX

Input Load Current

 

GND < VIN < VDDQ

 

 

 

 

 

–5

 

5

 

 

µA

Identification Register Definitions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction Field

 

 

CY7C1471V25

 

CY7C1473V25

CY7C1475V25

 

 

 

Description

 

 

(2MX36)

 

(4MX18)

 

 

(1MX72)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Revision Number (31:29)

 

 

000

 

 

000

 

 

000

 

Describes the version number

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Device Depth (28:24)

 

 

 

01011

 

01011

 

 

01011

 

Reserved for internal use

 

 

 

 

 

 

 

 

 

 

 

Architecture/Memory Type(23:18)

 

 

001001

 

001001

 

 

001001

 

Defines memory type and architecture

 

 

 

 

 

 

 

 

 

 

 

Bus Width/Density(17:12)

 

 

100100

 

010100

 

 

110100

 

Defines width and density

 

 

 

 

 

 

 

 

 

Cypress JEDEC ID Code (11:1)

 

 

00000110100

 

00000110100

00000110100

 

Allows unique identification of SRAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

vendor

 

 

 

 

 

 

 

 

 

 

 

ID Register Presence Indicator (0)

 

 

1

 

 

 

 

 

1

 

 

1

 

Indicates the presence of an ID

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

register

 

 

 

 

 

 

 

 

 

 

 

Note

12. All voltages refer to VSS (GND).

Document #: 38-05287 Rev. *I

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Contents Functional Description1 FeaturesSelection Guide 133 MHz 100 MHz UnitLogic Block Diagram CY7C1473V25 4M x Logic Block Diagram CY7C1471V25 2M xLogic Block Diagram CY7C1475V25 1M x CY7C1471V25 Pin Configurations Pin Tqfp PinoutCY7C1473V25 CY7C1473V25 4M x ADV/LD Pin Definitions Burst Read Accesses Single Read AccessesSingle Write Accesses Functional OverviewZZ Mode Electrical Characteristics Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table Mode = GND Used Truth TableAddress Operation Function BW b BW a Truth Table for Read/WriteFunction Ieee 1149.1 Serial Boundary Scan Jtag TAP Controller State DiagramTAP Controller Block Diagram TAP Instruction Set TAP RegistersBypass TAP TimingParameter Description Min Max Unit Clock TAP AC Switching CharacteristicsOutput Times Hold Times5V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions8V TAP AC Test Conditions Identification Codes Scan Register SizesRegister Name Bit Size Instruction Code DescriptionBit # Ball ID Boundary Scan Exit Order 2M xBoundary Scan Exit Order 4M x P10 Boundary Scan Exit Order 1M xW10 V10Operating Range Electrical CharacteristicsMaximum Ratings AC Test Loads and Waveforms CapacitanceThermal Resistance Setup Times Switching CharacteristicsParameter Description 133 MHz 100 MHz Unit Min CENRead Switching WaveformsRite QA2 AddressStall Stall NOPDON’T Care Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History Issue Orig. Description of Change DateVKN/AESA VKN
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