Cypress CY7C1462AV25, CY7C1464AV25, CY7C1460AV25 manual Ordering Information

Page 22

CY7C1460AV25

CY7C1462AV25

CY7C1464AV25

Ordering Information

Not all of the speed, package and temperature ranges are available. Please contact your local sales representative or

visit www.cypress.com for actual products offered.

Speed

Ordering Code

Package

Part and Package Type

Operating

(MHz)

Diagram

Range

 

 

 

 

 

167

CY7C1460AV25-167AXC

51-85050

100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Commercial

 

 

 

 

 

 

CY7C1462AV25-167AXC

 

 

 

 

 

 

 

 

 

CY7C1460AV25-167BZC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1462AV25-167BZC

 

 

 

 

 

 

 

 

 

CY7C1460AV25-167BZXC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1462AV25-167BZXC

 

 

 

 

 

 

 

 

 

CY7C1464AV25-167BGC

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1464AV25-167BGXC

 

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1460AV25-167AXI

51-85050

100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

lndustrial

 

 

 

 

 

 

CY7C1462AV25-167AXI

 

 

 

 

 

 

 

 

 

CY7C1460AV25-167BZI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1462AV25-167BZI

 

 

 

 

 

 

 

 

 

CY7C1460AV25-167BZXI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1462AV25-167BZXI

 

 

 

 

 

 

 

 

 

CY7C1464AV25-167BGI

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1464AV25-167BGXI

 

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Lead-Free

 

 

 

 

 

 

200

CY7C1460AV25-200AXC

51-85050

100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

Commercial

 

 

 

 

 

 

CY7C1462AV25-200AXC

 

 

 

 

 

 

 

 

 

CY7C1460AV25-200BZC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1462AV25-200BZC

 

 

 

 

 

 

 

 

 

CY7C1460AV25-200BZXC

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1462AV25-200BZXC

 

 

 

 

 

 

 

 

 

CY7C1464AV25-200BGC

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1464AV25-200BGXC

 

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1460AV25-200AXI

51-85050

100-Pin Thin Quad Flat Pack (14 x 20 x 1.4 mm) Lead-Free

lndustrial

 

 

 

 

 

 

CY7C1462AV25-200AXI

 

 

 

 

 

 

 

 

 

CY7C1460AV25-200BZI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm)

 

 

 

 

 

 

 

CY7C1462AV25-200BZI

 

 

 

 

 

 

 

 

 

CY7C1460AV25-200BZXI

51-85165

165-ball Fine-Pitch Ball Grid Array (15 x 17 x 1.4 mm) Lead-Free

 

 

 

 

 

 

 

CY7C1462AV25-200BZXI

 

 

 

 

 

 

 

 

 

CY7C1464AV25-200BGI

51-85167

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm)

 

 

 

 

 

 

 

CY7C1464AV25-200BGXI

 

209-ball Fine-Pitch Ball Grid Array (14 × 22 × 1.76 mm) Lead-Free

 

 

 

 

 

 

Document #: 38-05354 Rev. *D

Page 22 of 27

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Contents Functional Description FeaturesLogic Block Diagram-CY7C1460AV25 1M x Cypress Semiconductor CorporationSelection Guide Logic Block Diagram-CY7C1462AV25 2M xLogic Block Diagram-CY7C1464AV25 512K x 250 MHz 200 MHz 167 MHz UnitPin Configurations Pin Tqfp Pinout 2M ×CY7C1462AV25 2M × Byte Write Select Inputs, active LOW. Qualified with Pin DefinitionsPin Name Type Pin Description ADV/LDType Pin Description Power supply inputs to the core of the devicePower supply for the I/O circuitry Clock input to the Jtag circuitrySingle Write Accesses Single Read AccessesBurst Read Accesses Burst Write AccessesLinear Burst Address Table Mode = GND Interleaved Burst Address Table Mode = Floating or VDDZZ Mode Electrical Characteristics Function CY7C1462AV25 Partial Write Cycle Description1, 2, 3Function CY7C1460AV25 BW d BW c BW b BW a Function CY7C1464AV25Test Access Port TAP TAP Controller Block Diagram TAP Controller State DiagramDisabling the Jtag Feature Performing a TAP ResetBypass Register TAP Instruction SetOutput Times TAP TimingParameter Description Min Max Unit Clock Set-up Times8V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Identification Register DefinitionsRegister Name Bit Size Scan Register SizesIdentification Codes Instruction Code DescriptionCY7C1460AV25 1M x 36, CY7C1462AV25 2M x Bit# Ball ID Ball Fbga Boundary Scan Order12Bit# Ball ID Ball Fbga Boundary Scan Order 12 CY7C1464AV25 512K x Bit# Ball IDOperating Range Electrical Characteristics Over the Operating Range14Maximum Ratings Ambient RangeThermal Resistance Capacitance16AC Test Loads and Waveforms Switching Characteristics Over the Operating Range 21 250 200 167 Parameter Description Unit Min MaxRead/Write/Timing23, 24 Switching WaveformsNOP, Stall and Deselect Cycles23, 24 ZZ Mode Timing27 DON’T CareOrdering Information 250 Package Diagrams Pin Tqfp 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm SYT ECN No Issue Date Orig. Description of ChangeDocument History RXU

CY7C1462AV25, CY7C1460AV25, CY7C1464AV25 specifications

The Cypress CY7C1464AV25, CY7C1460AV25, and CY7C1462AV25 are a family of high-performance synchronous SRAM devices that have been designed for applications requiring fast memory access and low latency. These memory chips are particularly appealing for systems in telecommunications, networking, and embedded applications due to their versatility and robust performance specifications.

One of the standout features of the CY7C1464AV25 series is their large capacities. The CY7C1464AV25 offers a capacity of 4 Megabits (512 K x 8), making it well-suited for applications that demand ample memory while maintaining high-speed operations. In contrast, the CY7C1460AV25 and CY7C1462AV25 provide slightly smaller capacities of 1 Megabit (128 K x 8) and 2 Megabits (256 K x 8) respectively, catering to varying system memory requirements.

All three devices utilize Cypress's advanced synchronous SRAM technology. This enables the chips to support burst read and write modes, allowing for rapid data transfer rates. The CY7C1464AV25 delivers a data access time of as low as 5.5 ns, making it highly efficient for data-intensive applications. Additionally, the standard operating voltage of 2.5V aids in reducing power consumption and improving overall system energy efficiency.

The chips are also characterized by a simple interface and compatibility with common bus protocols, which facilitates easy integration into existing systems. They feature a dual-port architecture, allowing multiple data transfers to occur simultaneously, significantly improving throughput.

With a commercial temperature range, all three devices offer reliability and are suited for a wide range of operating environments. The package options include a compact 44-pin TSOP, allowing for space-saving designs in modern electronics.

In summary, the Cypress CY7C1464AV25, CY7C1460AV25, and CY7C1462AV25 provide a powerful blend of capacity, speed, and efficiency, making them ideal choices for demanding applications in various sectors. Their advanced technologies and versatility make them excellent candidates for enhancing system performance while maintaining low power consumption and ensuring reliable operation in various conditions.