Cypress CY7C68013A manual Register Addresses, External Code Memory, EA =

Page 9

CY7C68013A, CY7C68014A

CY7C68015A, CY7C68016A

Figure 4. External Code Memory, EA = 1

 

 

Inside FX2LP

 

 

 

 

Outside FX2LP

 

FFFF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7.5 KBytes

 

 

(OK to populate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USB regs and

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4K FIFO buffers

 

 

 

 

data memory

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(RD#,WR#)

 

 

 

 

here—RD#/WR#

 

 

 

 

 

 

E200

 

 

 

 

 

 

 

strobes are not

 

 

 

 

 

 

E1FF

 

 

 

 

 

 

 

active)

 

 

 

 

 

 

0.5 KBytes RAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E000

Data (RD#,WR#)*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

40 KBytes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

External

 

 

64 KBytes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Memory

 

 

External

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(RD#,WR#)

 

 

Code

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Memory

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(PSEN#)

 

3FFF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

16 KBytes

 

 

 

 

 

(Ok to populate

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

data memory

 

 

 

 

 

 

 

 

 

 

 

 

RAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

here—RD#/WR#

 

 

 

 

 

 

 

 

 

 

 

 

Data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

strobes are not

 

 

 

 

 

 

 

 

 

 

 

 

(RD#,WR#)*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

active)

 

 

 

 

 

 

0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data

Code

*SUDPTR, USB upload/download, I2C interface boot access

3.11 Register Addresses

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FFFF

 

 

 

4 KBytes EP2-EP8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

buffers

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(8 x 512)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

F000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EFFF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E800

 

 

2 KBytes RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E7FF

 

 

 

64 Bytes EP1IN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E7C0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E7BF

 

 

 

64 Bytes EP1OUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E780

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E77F

 

 

64 Bytes EP0 IN/OUT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E740

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E73F

 

 

64 Bytes RESERVED

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E700

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E6FF

 

8051 Addressable Registers

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E500

(512)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E4FF

 

 

 

Reserved (128)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E480

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E47F

128 bytes GPIF Waveforms

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E400

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E3FF

 

 

 

Reserved (512)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E200

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E1FF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

512 bytes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E000

 

 

 

8051 xdata RAM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document #: 38-08032 Rev. *L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Page 9 of 62

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Contents Cypress Semiconductor Corporation 198 Champion Court Features CY7C68013A/14A/15A/16ALogic Block Diagram Features CY7C68013A/14A onlyFeatures CY7C68015A/16A only Functional Overview ApplicationsBus-powered Applications USB Boot MethodsReNumeration Interrupt SystemINT2 USB Interrupts Priority INT2VEC Value SourceFIFO/GPIF Interrupt INT4 Reset Pin Reset and WakeupProgram/Data RAM Reset Timing Values ConditionInternal Code Memory, EA = Inside FX2LP Outside FX2LPExternal Code Memory, EA = Register AddressesEndpoint Configurations High -speed Mode Setup Data BufferEndpoint RAM Size × 64 bytes Endpoints 0 × 512 bytesMaster/Slave Control Signals 12.5 Default Full-Speed Alternate SettingsExternal Fifo Interface ArchitectureECC Generation7 Autopointer AccessGpif USB Uploads and DownloadsCompatible with Previous Generation EZ-USB FX2 18 I2C ControllerPart Number Conversion Table Package Description20 CY7C68013A/14A and CY7C68015A/16A Differences Pin AssignmentsIfclk PE0 PE1128 Pin Tqfp CY7C68013A/CY7C68014ACY7C68013A/CY7C68014A CY7C68013A/CY7C68014A 56-pin Ssop Pin Assignment CY7C68013A/CY7C68014A 56-pin SsopCY7C68015A/CY7C68016A Pin QFN CY7C68013A 56-pin Vfbga Pin Assignment Top View CY7C68013A/15A Pin Descriptions FX2LP Pin Descriptions 128 100 56 VF Name Type Default56 VF Name Type Default Description FX2LP Pin DescriptionsPort WU2 IFCONFIG1..0FIFOADR0 FIFOADR1PORTCCFG.0 GPIFADR0GPIFADR1 PORTCCFG.1T0OUT Port ET1OUT T2OUTINT6 RXD1OUTT2EX GPIFADR8Flagc FlagbCTL3 CTL4Ground FX2LP Register Summary Register SummaryRegister can only be reset, it cannot be set Epie EP0CS E6CB Flowstb DPL0 = both read/write bit Absolute Maximum Ratings Thermal CharacteristicsOperating Conditions ΘJc + θCaDC Characteristics AC Electrical CharacteristicsUSB Transceiver Program Memory Read ClkoutProgram Memory Read Parameters Description Min Typ Max Unit Data Memory Read CLKOUT17Data Memory Read Parameters Description Min Typ Max Unit Data Memory Write Stretch =Data Memory Write Parameters Description Min Max Unit WR# Strobe Function when Portc is Accessed by Portc Strobe Feature TimingsGpif Synchronous Signals Timing Diagram20 Gpif Synchronous SignalsSlave Fifo Synchronous Read Slave Fifo Synchronous Read Timing Diagram20Slave Fifo Asynchronous Read Slave Fifo Asynchronous Read Timing Diagram20Slave Fifo Synchronous Write Slave Fifo Synchronous Write Timing Diagram20Slave Fifo Synchronous Packet End Strobe Slave Fifo Asynchronous WriteSlave Fifo Asynchronous Packet End Strobe Slave Fifo Synchronous Write Sequence and Timing DiagramSlave Fifo Address to Flags/Data Slave Fifo Output EnableSlave Fifo Synchronous Address FIFOADR10 to SLRD/SLWR/PKTEND Setup TimeSlave Fifo Asynchronous Address RD/WR/PKTEND to FIFOADR10 Hold TimeSingle and Burst Synchronous Read Example Sequence Diagram10.17.2 Single and Burst Synchronous Write Slave Fifo Asynchronous Read Sequence and Timing Diagram20 Sequence Diagram of a Single and Burst Asynchronous ReadSlave Fifo Asynchronous Write Sequence and Timing Diagram20 Sequence Diagram of a Single and Burst Asynchronous WriteIdeal for non-battery powered applications Ideal for battery powered applicationsOrdering Information Development Tool KitLead Shrunk Small Outline Package O56 Package DiagramsLead QFN 8 x 8 mm LF56A Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A100RA Lead Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A128 Vfbga 5 x 5 x 1.0 mm 0.50 Pitch, 0.30 Ball BZ56 PCB Layout RecommendationsCross-section of the Area Underneath the QFN Package Quad Flat Package No Leads QFN Package Design NotesIssue Orig. Description of Change Date Pyrs Cmcc

CY7C68013A specifications

The Cypress CY7C68013A is a high-performance USB microcontroller that belongs to Cypress's FX2LP family, specifically designed for USB applications. This microcontroller is well-regarded for its versatility, making it a popular choice for developers engaged in USB-enabled projects.

One of the main features of the CY7C68013A is its ability to support USB 2.0, with both high-speed (480 Mbps) and full-speed (12 Mbps) operation. This capability allows developers to take full advantage of the USB interface for data transfer, making it suitable for applications that require fast and efficient data communication. The device integrates a USB controller along with an 8051-compatible microcontroller, providing a seamless interface for USB transactions while also allowing for custom processing tasks.

The CY7C68013A offers 32 KB of internal RAM, which is a valuable resource for data buffering and temporary storage during data transfer operations. Additionally, it includes a programmable 8-bit I/O interface, which can be tailored to various application needs, facilitating control over peripheral devices. The microcontroller also features a 16-bit address bus and a 16-bit data bus, enhancing its ability to interface with external memory and components.

In terms of development, moving from concept to production becomes easier due to the availability of development kits and software support. The CY7C68013A is compatible with Cypress's EZ-USB development environment, which includes APIs and libraries that simplify the coding process. This software support empowers developers to create sophisticated USB-related applications without needing extensive background knowledge in USB protocol intricacies.

Regarding power efficiency, the CY7C68013A operates at low power consumption levels, making it suitable for battery-operated devices. It supports various low-power modes, which further enhances its appeal for portable applications.

Overall, the Cypress CY7C68013A stands out for its robust features, flexibility, and ease of use, making it an ideal choice for engineers working on USB-centric designs. Its combination of high-speed USB functionality, ample internal resources, and strong software support positions it as a go-to microcontroller for a wide variety of applications, ranging from consumer electronics to industrial systems.
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