Cypress CY7C68013A manual Absolute Maximum Ratings, Operating Conditions, Thermal Characteristics

Page 36

 

 

 

CY7C68013A, CY7C68014A

 

 

 

CY7C68015A, CY7C68016A

 

 

 

 

 

 

 

 

 

6. Absolute Maximum Ratings

 

 

Storage Temperature

65°C to +150°C

Ambient Temperature with Power Supplied (Commercial)

0°C to +70°C

Ambient Temperature with Power Supplied (Industrial)

–40°C to +105°C

Supply Voltage to Ground Potential

–0.5V to +4.0V

DC Input Voltage to Any Input Pin[15]

5.25V

DC Voltage Applied to Outputs in High Z State

–0.5V to VCC + 0.5V

Power Dissipation

300 mW

Static Discharge Voltage

>2000V

Max Output Current, per IO port

10 mA

Max Output Current, all five IO ports (128- and 100-pin packages)

50 mA

7. Operating Conditions

 

 

TA (Ambient Temperature Under Bias) Commercial

0°C to +70°C

TA (Ambient Temperature Under Bias) Industrial

–40°C to +105°C

Supply Voltage

+3.00V to +3.60V

Ground Voltage

0V

FOSC (Oscillator or Crystal Frequency)

24 MHz ± 100 ppm, Parallel Resonant

8. Thermal Characteristics

 

 

The following table displays the thermal characteristics of various packages:

Table 13. Thermal Characteristics

 

 

 

 

 

 

 

 

 

 

 

θa

θJc

θCa

θJa

 

 

Junction to Case

Case to Ambient

Junction to Ambient Temperature

Package

Ambient Temperature

Temperature

Temperature

θJc + θCa

 

 

(°C)

(°C/W)

(°C/W)

(°C/W)

 

 

 

56

SSOP

70

24.4

23.3

47.7

 

 

 

 

 

100 TQFP

70

11.9

34.0

45.9

 

 

 

 

 

128 TQFP

70

15.5

27.7

43.2

 

 

 

 

 

 

56

QFN

70

10.6

14.6

25.2

 

 

 

 

 

 

56

VFBGA

70

30.9

27.7

58.6

 

 

 

 

 

 

The Junction Temperature θj, can be calculated using the following equation: θj = P*θJa + θa where,

P = Power

θJa = Junction to Ambient Temperature (θJc + θCa) θa = Ambient Temperature (70 C)

The Case Temperature θc, can be calculated using the following equation: θc = P*θCa + θa where,

P = Power

θCa = Case to Ambient Temperature θa = Ambient Temperature (70 C)

Note

15. Do not power IO with chip power off.

Document #: 38-08032 Rev. *L

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Contents Features CY7C68013A/14A/15A/16A Cypress Semiconductor Corporation 198 Champion CourtLogic Block Diagram Features CY7C68013A/14A onlyFeatures CY7C68015A/16A only Applications Functional OverviewUSB Boot Methods Bus-powered ApplicationsReNumeration Interrupt SystemINT2 USB Interrupts Priority INT2VEC Value SourceFIFO/GPIF Interrupt INT4 Reset and Wakeup Reset PinReset Timing Values Condition Program/Data RAMInside FX2LP Outside FX2LP Internal Code Memory, EA =Register Addresses External Code Memory, EA =Setup Data Buffer Endpoint Configurations High -speed ModeEndpoint RAM Size × 64 bytes Endpoints 0 × 512 bytes12.5 Default Full-Speed Alternate Settings Master/Slave Control SignalsExternal Fifo Interface ArchitectureAutopointer Access ECC Generation7Gpif USB Uploads and Downloads18 I2C Controller Compatible with Previous Generation EZ-USB FX2Part Number Conversion Table Package DescriptionPin Assignments 20 CY7C68013A/14A and CY7C68015A/16A DifferencesIfclk PE0 PE1128 CY7C68013A/CY7C68014A Pin TqfpCY7C68013A/CY7C68014A CY7C68013A/CY7C68014A 56-pin Ssop CY7C68013A/CY7C68014A 56-pin Ssop Pin AssignmentCY7C68015A/CY7C68016A Pin QFN CY7C68013A 56-pin Vfbga Pin Assignment Top View FX2LP Pin Descriptions 128 100 56 VF Name Type Default CY7C68013A/15A Pin Descriptions56 VF Name Type Default Description FX2LP Pin DescriptionsPort IFCONFIG1..0 WU2FIFOADR0 FIFOADR1GPIFADR0 PORTCCFG.0GPIFADR1 PORTCCFG.1Port E T0OUTT1OUT T2OUTRXD1OUT INT6T2EX GPIFADR8Flagb FlagcCTL3 CTL4Ground Register Summary FX2LP Register SummaryRegister can only be reset, it cannot be set Epie EP0CS E6CB Flowstb DPL0 = both read/write bit Thermal Characteristics Absolute Maximum RatingsOperating Conditions ΘJc + θCaDC Characteristics AC Electrical CharacteristicsUSB Transceiver Program Memory Read ClkoutProgram Memory Read Parameters Description Min Typ Max Unit Data Memory Read CLKOUT17Data Memory Read Parameters Description Min Typ Max Unit Data Memory Write Stretch =Data Memory Write Parameters Description Min Max Unit Portc Strobe Feature Timings WR# Strobe Function when Portc is Accessed byGpif Synchronous Signals Gpif Synchronous Signals Timing Diagram20Slave Fifo Synchronous Read Timing Diagram20 Slave Fifo Synchronous ReadSlave Fifo Asynchronous Read Timing Diagram20 Slave Fifo Asynchronous ReadSlave Fifo Synchronous Write Timing Diagram20 Slave Fifo Synchronous WriteSlave Fifo Asynchronous Write Slave Fifo Synchronous Packet End StrobeSlave Fifo Synchronous Write Sequence and Timing Diagram Slave Fifo Asynchronous Packet End StrobeSlave Fifo Output Enable Slave Fifo Address to Flags/DataFIFOADR10 to SLRD/SLWR/PKTEND Setup Time Slave Fifo Synchronous AddressSlave Fifo Asynchronous Address RD/WR/PKTEND to FIFOADR10 Hold TimeSequence Diagram Single and Burst Synchronous Read Example10.17.2 Single and Burst Synchronous Write Sequence Diagram of a Single and Burst Asynchronous Read Slave Fifo Asynchronous Read Sequence and Timing Diagram20Sequence Diagram of a Single and Burst Asynchronous Write Slave Fifo Asynchronous Write Sequence and Timing Diagram20Ideal for battery powered applications Ideal for non-battery powered applicationsOrdering Information Development Tool KitPackage Diagrams Lead Shrunk Small Outline Package O56Lead QFN 8 x 8 mm LF56A Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A100RA Lead Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A128 PCB Layout Recommendations Vfbga 5 x 5 x 1.0 mm 0.50 Pitch, 0.30 Ball BZ56Quad Flat Package No Leads QFN Package Design Notes Cross-section of the Area Underneath the QFN PackageIssue Orig. Description of Change Date Cmcc Pyrs

CY7C68013A specifications

The Cypress CY7C68013A is a high-performance USB microcontroller that belongs to Cypress's FX2LP family, specifically designed for USB applications. This microcontroller is well-regarded for its versatility, making it a popular choice for developers engaged in USB-enabled projects.

One of the main features of the CY7C68013A is its ability to support USB 2.0, with both high-speed (480 Mbps) and full-speed (12 Mbps) operation. This capability allows developers to take full advantage of the USB interface for data transfer, making it suitable for applications that require fast and efficient data communication. The device integrates a USB controller along with an 8051-compatible microcontroller, providing a seamless interface for USB transactions while also allowing for custom processing tasks.

The CY7C68013A offers 32 KB of internal RAM, which is a valuable resource for data buffering and temporary storage during data transfer operations. Additionally, it includes a programmable 8-bit I/O interface, which can be tailored to various application needs, facilitating control over peripheral devices. The microcontroller also features a 16-bit address bus and a 16-bit data bus, enhancing its ability to interface with external memory and components.

In terms of development, moving from concept to production becomes easier due to the availability of development kits and software support. The CY7C68013A is compatible with Cypress's EZ-USB development environment, which includes APIs and libraries that simplify the coding process. This software support empowers developers to create sophisticated USB-related applications without needing extensive background knowledge in USB protocol intricacies.

Regarding power efficiency, the CY7C68013A operates at low power consumption levels, making it suitable for battery-operated devices. It supports various low-power modes, which further enhances its appeal for portable applications.

Overall, the Cypress CY7C68013A stands out for its robust features, flexibility, and ease of use, making it an ideal choice for engineers working on USB-centric designs. Its combination of high-speed USB functionality, ample internal resources, and strong software support positions it as a go-to microcontroller for a wide variety of applications, ranging from consumer electronics to industrial systems.
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