Cypress CY7C68013A manual = both read/write bit

Page 35

CY7C68013A, CY7C68014A

CY7C68015A, CY7C68016A

Table 12. FX2LP Register Summary (continued)

Hex

Size

Name

Description

b7

b6

b5

b4

b3

b2

b1

b0

Default

Access

BE

1

GPIFSGLDATLX[13]

GPIF Data L w/ Trigger

D7

D6

D5

D4

D3

D2

D1

D0

xxxxxxxx

RW

BF

1

GPIFSGLDATL-

GPIF Data L w/ No Trigger

D7

D6

D5

D4

D3

D2

D1

D0

xxxxxxxx

R

 

 

NOX[13]

 

 

 

 

 

 

 

 

 

 

 

C0

1

SCON1[13]

Serial Port 1 Control (bit

SM0_1

SM1_1

SM2_1

REN_1

TB8_1

RB8_1

TI_1

RI_1

00000000

RW

 

 

 

addressable)

 

 

 

 

 

 

 

 

 

 

C1

1

SBUF1[13]

Serial Port 1 Data Buffer

D7

D6

D5

D4

D3

D2

D1

D0

00000000

RW

C2

6

reserved

 

 

 

 

 

 

 

 

 

 

 

C8

1

T2CON

Timer/Counter 2 Control

TF2

EXF2

RCLK

TCLK

EXEN2

TR2

CT2

CPRL2

00000000

RW

 

 

 

(bit addressable)

 

 

 

 

 

 

 

 

 

 

C9

1

reserved

 

 

 

 

 

 

 

 

 

 

 

CA

1

RCAP2L

Capture for Timer 2, au-

D7

D6

D5

D4

D3

D2

D1

D0

00000000

RW

 

 

 

to-reload, up-counter

 

 

 

 

 

 

 

 

 

 

CB

1

RCAP2H

Capture for Timer 2, au-

D7

D6

D5

D4

D3

D2

D1

D0

00000000

RW

 

 

 

to-reload, up-counter

 

 

 

 

 

 

 

 

 

 

CC

1

TL2

Timer 2 reload L

D7

D6

D5

D4

D3

D2

D1

D0

00000000

RW

CD

1

TH2

Timer 2 reload H

D15

D14

D13

D12

D11

D10

D9

D8

00000000

RW

CE

2

reserved

 

 

 

 

 

 

 

 

 

 

 

D0

1

PSW

Program Status Word (bit

CY

AC

F0

RS1

RS0

OV

F1

P

00000000

RW

 

 

 

addressable)

 

 

 

 

 

 

 

 

 

 

D1

7

reserved

 

 

 

 

 

 

 

 

 

 

 

D8

1

EICON[13]

External Interrupt Control

SMOD1

1

ERESI

RESI

INT6

0

0

0

01000000

RW

D9

7

reserved

 

 

 

 

 

 

 

 

 

 

 

E0

1

ACC

Accumulator (bit address-

D7

D6

D5

D4

D3

D2

D1

D0

00000000

RW

 

 

 

able)

 

 

 

 

 

 

 

 

 

 

E1

7

reserved

 

 

 

 

 

 

 

 

 

 

 

E8

1

EIE[13]

External Interrupt En-

1

1

1

EX6

EX5

EX4

EI²C

EUSB

11100000

RW

 

 

 

able(s)

 

 

 

 

 

 

 

 

 

 

E9

7

reserved

 

 

 

 

 

 

 

 

 

 

 

F0

1

B

B (bit addressable)

D7

D6

D5

D4

D3

D2

D1

D0

00000000

RW

F1

7

reserved

 

 

 

 

 

 

 

 

 

 

 

F8

1

EIP[13]

External Interrupt Priority

1

1

1

PX6

PX5

PX4

PI²C

PUSB

11100000

RW

 

 

 

Control

 

 

 

 

 

 

 

 

 

 

F9

7

reserved

 

 

 

 

 

 

 

 

 

 

 

R = all bits read-only

W = all bits write-only

r = read-only bit w = write-only bit

b = both read/write bit

Document #: 38-08032 Rev. *L

Page 35 of 62

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Contents Cypress Semiconductor Corporation 198 Champion Court Features CY7C68013A/14A/15A/16AFeatures CY7C68015A/16A only Logic Block DiagramFeatures CY7C68013A/14A only Functional Overview ApplicationsInterrupt System USB Boot MethodsBus-powered Applications ReNumerationFIFO/GPIF Interrupt INT4 INT2 USB InterruptsPriority INT2VEC Value Source Reset Pin Reset and WakeupProgram/Data RAM Reset Timing Values ConditionInternal Code Memory, EA = Inside FX2LP Outside FX2LPExternal Code Memory, EA = Register AddressesSize × 64 bytes Endpoints 0 × 512 bytes Setup Data BufferEndpoint Configurations High -speed Mode Endpoint RAMArchitecture 12.5 Default Full-Speed Alternate SettingsMaster/Slave Control Signals External Fifo InterfaceUSB Uploads and Downloads Autopointer AccessECC Generation7 GpifPackage Description 18 I2C ControllerCompatible with Previous Generation EZ-USB FX2 Part Number Conversion TablePE1 Pin Assignments20 CY7C68013A/14A and CY7C68015A/16A Differences Ifclk PE0128 Pin Tqfp CY7C68013A/CY7C68014ACY7C68013A/CY7C68014A CY7C68013A/CY7C68014A 56-pin Ssop Pin Assignment CY7C68013A/CY7C68014A 56-pin SsopCY7C68015A/CY7C68016A Pin QFN CY7C68013A 56-pin Vfbga Pin Assignment Top View CY7C68013A/15A Pin Descriptions FX2LP Pin Descriptions 128 100 56 VF Name Type DefaultPort 56 VF Name Type Default DescriptionFX2LP Pin Descriptions FIFOADR1 IFCONFIG1..0WU2 FIFOADR0PORTCCFG.1 GPIFADR0PORTCCFG.0 GPIFADR1T2OUT Port ET0OUT T1OUTGPIFADR8 RXD1OUTINT6 T2EXCTL4 FlagbFlagc CTL3Ground FX2LP Register Summary Register SummaryRegister can only be reset, it cannot be set Epie EP0CS E6CB Flowstb DPL0 = both read/write bit ΘJc + θCa Thermal CharacteristicsAbsolute Maximum Ratings Operating ConditionsUSB Transceiver DC CharacteristicsAC Electrical Characteristics Program Memory Read Parameters Description Min Typ Max Unit Program Memory ReadClkout Data Memory Read Parameters Description Min Typ Max Unit Data Memory ReadCLKOUT17 Data Memory Write Parameters Description Min Max Unit Data Memory WriteStretch = WR# Strobe Function when Portc is Accessed by Portc Strobe Feature TimingsGpif Synchronous Signals Timing Diagram20 Gpif Synchronous SignalsSlave Fifo Synchronous Read Slave Fifo Synchronous Read Timing Diagram20Slave Fifo Asynchronous Read Slave Fifo Asynchronous Read Timing Diagram20Slave Fifo Synchronous Write Slave Fifo Synchronous Write Timing Diagram20Slave Fifo Synchronous Packet End Strobe Slave Fifo Asynchronous WriteSlave Fifo Asynchronous Packet End Strobe Slave Fifo Synchronous Write Sequence and Timing DiagramSlave Fifo Address to Flags/Data Slave Fifo Output EnableRD/WR/PKTEND to FIFOADR10 Hold Time FIFOADR10 to SLRD/SLWR/PKTEND Setup TimeSlave Fifo Synchronous Address Slave Fifo Asynchronous AddressSingle and Burst Synchronous Read Example Sequence Diagram10.17.2 Single and Burst Synchronous Write Slave Fifo Asynchronous Read Sequence and Timing Diagram20 Sequence Diagram of a Single and Burst Asynchronous ReadSlave Fifo Asynchronous Write Sequence and Timing Diagram20 Sequence Diagram of a Single and Burst Asynchronous WriteDevelopment Tool Kit Ideal for battery powered applicationsIdeal for non-battery powered applications Ordering InformationLead Shrunk Small Outline Package O56 Package DiagramsLead QFN 8 x 8 mm LF56A Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A100RA Lead Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A128 Vfbga 5 x 5 x 1.0 mm 0.50 Pitch, 0.30 Ball BZ56 PCB Layout RecommendationsCross-section of the Area Underneath the QFN Package Quad Flat Package No Leads QFN Package Design NotesIssue Orig. Description of Change Date Pyrs Cmcc

CY7C68013A specifications

The Cypress CY7C68013A is a high-performance USB microcontroller that belongs to Cypress's FX2LP family, specifically designed for USB applications. This microcontroller is well-regarded for its versatility, making it a popular choice for developers engaged in USB-enabled projects.

One of the main features of the CY7C68013A is its ability to support USB 2.0, with both high-speed (480 Mbps) and full-speed (12 Mbps) operation. This capability allows developers to take full advantage of the USB interface for data transfer, making it suitable for applications that require fast and efficient data communication. The device integrates a USB controller along with an 8051-compatible microcontroller, providing a seamless interface for USB transactions while also allowing for custom processing tasks.

The CY7C68013A offers 32 KB of internal RAM, which is a valuable resource for data buffering and temporary storage during data transfer operations. Additionally, it includes a programmable 8-bit I/O interface, which can be tailored to various application needs, facilitating control over peripheral devices. The microcontroller also features a 16-bit address bus and a 16-bit data bus, enhancing its ability to interface with external memory and components.

In terms of development, moving from concept to production becomes easier due to the availability of development kits and software support. The CY7C68013A is compatible with Cypress's EZ-USB development environment, which includes APIs and libraries that simplify the coding process. This software support empowers developers to create sophisticated USB-related applications without needing extensive background knowledge in USB protocol intricacies.

Regarding power efficiency, the CY7C68013A operates at low power consumption levels, making it suitable for battery-operated devices. It supports various low-power modes, which further enhances its appeal for portable applications.

Overall, the Cypress CY7C68013A stands out for its robust features, flexibility, and ease of use, making it an ideal choice for engineers working on USB-centric designs. Its combination of high-speed USB functionality, ample internal resources, and strong software support positions it as a go-to microcontroller for a wide variety of applications, ranging from consumer electronics to industrial systems.