Cypress CY7C68013A manual Epie

Page 31

CY7C68013A, CY7C68014A

CY7C68015A, CY7C68016A

Table 12. FX2LP Register Summary (continued)

Hex

Size

Name

Description

b7

b6

b5

b4

b3

b2

b1

b0

Default

Access

E65D

1

USBIRQ[12]

USB Interrupt Requests

0

EP0ACK

HSGRANT

URES

SUSP

SUTOK

SOF

SUDAV

0xxxxxxx

rbbbbbbb

E65E

1

EPIE

Endpoint Interrupt

EP8

EP6

EP4

EP2

EP1OUT

EP1IN

EP0OUT

EP0IN

00000000

RW

Enables

E65F

1

EPIRQ[12]

Endpoint Interrupt

EP8

EP6

EP4

EP2

EP1OUT

EP1IN

EP0OUT

EP0IN

0

RW

Requests

E660

1

GPIFIE[11]

GPIF Interrupt Enable

0

0

0

0

0

0

GPIFWF

GPIFDONE

00000000

RW

E661

1

GPIFIRQ[11]

GPIF Interrupt Request

0

0

0

0

0

0

GPIFWF

GPIFDONE

000000xx

RW

E662

1

USBERRIE

USB Error Interrupt

ISOEP8

ISOEP6

ISOEP4

ISOEP2

0

0

0

ERRLIMIT

00000000

RW

Enables

E663

1

USBERRIRQ[12]

USB Error Interrupt

ISOEP8

ISOEP6

ISOEP4

ISOEP2

0

0

0

ERRLIMIT

0000000x

bbbbrrrb

Requests

E664

1

ERRCNTLIM

USB Error counter and

EC3

EC2

EC1

EC0

LIMIT3

LIMIT2

LIMIT1

LIMIT0

xxxx0100

rrrrbbbb

limit

E665

1

CLRERRCNT

Clear Error Counter EC3:0

x

x

x

x

x

x

x

x

xxxxxxxx

W

E666

1

INT2IVEC

Interrupt 2 (USB)

0

I2V4

I2V3

I2V2

I2V1

I2V0

0

0

00000000

R

Autovector

E667

1

INT4IVEC

Interrupt 4 (slave FIFO &

1

0

I4V3

I4V2

I4V1

I4V0

0

0

10000000

R

GPIF) Autovector

E668

1

INTSET-UP

Interrupt 2&4 setup

0

0

0

0

AV2EN

0

INT4SRC

AV4EN

00000000

RW

E669

7

reserved

INPUT / OUTPUT

E670

1

PORTACFG

IO PORTA Alternate

FLAGD

SLCS

0

0

0

0

INT1

INT0

00000000

RW

Configuration

E671

1

PORTCCFG

IO PORTC Alternate

GPIFA7

GPIFA6

GPIFA5

GPIFA4

GPIFA3

GPIFA2

GPIFA1

GPIFA0

00000000

RW

Configuration

E672

1

PORTECFG

IO PORTE Alternate

GPIFA8

T2EX

INT6

RXD1OUT

RXD0OUT

T2OUT

T1OUT

T0OUT

00000000

RW

Configuration

E673

4

reserved

E677

1

reserved

E678

1

I2CS

I²C Bus

START

STOP

LASTRD

ID1

ID0

BERR

ACK

DONE

000xx000

bbbrrrrr

Control & Status

E679

1

I2DAT

I²C Bus

d7

d6

d5

d4

d3

d2

d1

d0

xxxxxxxx

RW

Data

E67A

1

I2CTL

I²C Bus

0

0

0

0

0

0

STOPIE

400KHZ

00000000

RW

Control

E67B

1

XAUTODAT1

Autoptr1 MOVX access,

D7

D6

D5

D4

D3

D2

D1

D0

xxxxxxxx

RW

when APTREN=1

E67C

1

XAUTODAT2

Autoptr2 MOVX access,

D7

D6

D5

D4

D3

D2

D1

D0

xxxxxxxx

RW

when APTREN=1

UDMA CRC

E67D

1

UDMACRCH[11]

UDMA CRC MSB

CRC15

CRC14

CRC13

CRC12

CRC11

CRC10

CRC9

CRC8

01001010

RW

E67E

1

UDMACRCL[11]

UDMA CRC LSB

CRC7

CRC6

CRC5

CRC4

CRC3

CRC2

CRC1

CRC0

10111010

RW

E67F

1

UDMACRC-

UDMA CRC Qualifier

QENABLE

0

0

0

QSTATE

QSIGNAL2

QSIGNAL1

QSIGNAL0

00000000

brrrbbbb

QUALIFIER

USB CONTROL

E680

1

USBCS

USB Control & Status

HSM

0

0

0

DISCON

NOSYNSOF

RENUM

SIGRSUME

x0000000

rrrrbbbb

E681

1

SUSPEND

Put chip into suspend

x

x

x

x

x

x

x

x

xxxxxxxx

W

E682

1

WAKEUPCS

Wakeup Control & Status

WU2

WU

WU2POL

WUPOL

0

DPEN

WU2EN

WUEN

xx000101

bbbbrbbb

E683

1

TOGCTL

Toggle Control

Q

S

R

IO

EP3

EP2

EP1

EP0

x0000000

rrrbbbbb

E684

1

USBFRAMEH

USB Frame count H

0

0

0

0

0

FC10

FC9

FC8

00000xxx

R

E685

1

USBFRAMEL

USB Frame count L

FC7

FC6

FC5

FC4

FC3

FC2

FC1

FC0

xxxxxxxx

R

E686

1

MICROFRAME

Microframe count, 0-7

0

0

0

0

0

MF2

MF1

MF0

00000xxx

R

E687

1

FNADDR

USB Function address

0

FA6

FA5

FA4

FA3

FA2

FA1

FA0

0xxxxxxx

R

E688

2

reserved

ENDPOINTS

E68A

1

EP0BCH[11]

Endpoint 0 Byte Count H

(BC15)

(BC14)

(BC13)

(BC12)

(BC11)

(BC10)

(BC9)

(BC8)

xxxxxxxx

RW

E68B

1

EP0BCL[11]

Endpoint 0 Byte Count L

(BC7)

BC6

BC5

BC4

BC3

BC2

BC1

BC0

xxxxxxxx

RW

E68C

1

reserved

E68D

1

EP1OUTBC

Endpoint 1 OUT Byte

0

BC6

BC5

BC4

BC3

BC2

BC1

BC0

0xxxxxxx

RW

Count

E68E

1

reserved

E68F

1

EP1INBC

Endpoint 1 IN Byte Count

0

BC6

BC5

BC4

BC3

BC2

BC1

BC0

0xxxxxxx

RW

E690

1

EP2BCH[11]

Endpoint 2 Byte Count H

0

0

0

0

0

BC10

BC9

BC8

00000xxx

RW

E691

1

EP2BCL[11]

Endpoint 2 Byte Count L

BC7/SKIP

BC6

BC5

BC4

BC3

BC2

BC1

BC0

xxxxxxxx

RW

E692

2

reserved

E694

1

EP4BCH[11]

Endpoint 4 Byte Count H

0

0

0

0

0

0

BC9

BC8

000000xx

RW

E695

1

EP4BCL[11]

Endpoint 4 Byte Count L

BC7/SKIP

BC6

BC5

BC4

BC3

BC2

BC1

BC0

xxxxxxxx

RW

E696

2

reserved

E698

1

EP6BCH[11]

Endpoint 6 Byte Count H

0

0

0

0

0

BC10

BC9

BC8

00000xxx

RW

E699

1

EP6BCL[11]

Endpoint 6 Byte Count L

BC7/SKIP

BC6

BC5

BC4

BC3

BC2

BC1

BC0

xxxxxxxx

RW

E69A

2

reserved

E69C

1

EP8BCH[11]

Endpoint 8 Byte Count H

0

0

0

0

0

0

BC9

BC8

000000xx

RW

Document #: 38-08032 Rev. *L

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Contents Cypress Semiconductor Corporation 198 Champion Court Features CY7C68013A/14A/15A/16AFeatures CY7C68013A/14A only Logic Block DiagramFeatures CY7C68015A/16A only Functional Overview ApplicationsInterrupt System USB Boot MethodsBus-powered Applications ReNumerationPriority INT2VEC Value Source INT2 USB InterruptsFIFO/GPIF Interrupt INT4 Reset Pin Reset and WakeupProgram/Data RAM Reset Timing Values ConditionInternal Code Memory, EA = Inside FX2LP Outside FX2LPExternal Code Memory, EA = Register AddressesSize × 64 bytes Endpoints 0 × 512 bytes Setup Data BufferEndpoint Configurations High -speed Mode Endpoint RAMArchitecture 12.5 Default Full-Speed Alternate SettingsMaster/Slave Control Signals External Fifo InterfaceUSB Uploads and Downloads Autopointer AccessECC Generation7 GpifPackage Description 18 I2C ControllerCompatible with Previous Generation EZ-USB FX2 Part Number Conversion TablePE1 Pin Assignments20 CY7C68013A/14A and CY7C68015A/16A Differences Ifclk PE0128 Pin Tqfp CY7C68013A/CY7C68014ACY7C68013A/CY7C68014A CY7C68013A/CY7C68014A 56-pin Ssop Pin Assignment CY7C68013A/CY7C68014A 56-pin SsopCY7C68015A/CY7C68016A Pin QFN CY7C68013A 56-pin Vfbga Pin Assignment Top View CY7C68013A/15A Pin Descriptions FX2LP Pin Descriptions 128 100 56 VF Name Type DefaultFX2LP Pin Descriptions 56 VF Name Type Default DescriptionPort FIFOADR1 IFCONFIG1..0WU2 FIFOADR0PORTCCFG.1 GPIFADR0PORTCCFG.0 GPIFADR1T2OUT Port ET0OUT T1OUTGPIFADR8 RXD1OUTINT6 T2EXCTL4 FlagbFlagc CTL3Ground FX2LP Register Summary Register SummaryRegister can only be reset, it cannot be set Epie EP0CS E6CB Flowstb DPL0 = both read/write bit ΘJc + θCa Thermal CharacteristicsAbsolute Maximum Ratings Operating ConditionsAC Electrical Characteristics DC CharacteristicsUSB Transceiver Clkout Program Memory ReadProgram Memory Read Parameters Description Min Typ Max Unit CLKOUT17 Data Memory ReadData Memory Read Parameters Description Min Typ Max Unit Stretch = Data Memory WriteData Memory Write Parameters Description Min Max Unit WR# Strobe Function when Portc is Accessed by Portc Strobe Feature TimingsGpif Synchronous Signals Timing Diagram20 Gpif Synchronous SignalsSlave Fifo Synchronous Read Slave Fifo Synchronous Read Timing Diagram20Slave Fifo Asynchronous Read Slave Fifo Asynchronous Read Timing Diagram20Slave Fifo Synchronous Write Slave Fifo Synchronous Write Timing Diagram20Slave Fifo Synchronous Packet End Strobe Slave Fifo Asynchronous WriteSlave Fifo Asynchronous Packet End Strobe Slave Fifo Synchronous Write Sequence and Timing DiagramSlave Fifo Address to Flags/Data Slave Fifo Output EnableRD/WR/PKTEND to FIFOADR10 Hold Time FIFOADR10 to SLRD/SLWR/PKTEND Setup TimeSlave Fifo Synchronous Address Slave Fifo Asynchronous AddressSingle and Burst Synchronous Read Example Sequence Diagram10.17.2 Single and Burst Synchronous Write Slave Fifo Asynchronous Read Sequence and Timing Diagram20 Sequence Diagram of a Single and Burst Asynchronous ReadSlave Fifo Asynchronous Write Sequence and Timing Diagram20 Sequence Diagram of a Single and Burst Asynchronous WriteDevelopment Tool Kit Ideal for battery powered applicationsIdeal for non-battery powered applications Ordering InformationLead Shrunk Small Outline Package O56 Package DiagramsLead QFN 8 x 8 mm LF56A Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A100RA Lead Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A128 Vfbga 5 x 5 x 1.0 mm 0.50 Pitch, 0.30 Ball BZ56 PCB Layout RecommendationsCross-section of the Area Underneath the QFN Package Quad Flat Package No Leads QFN Package Design NotesIssue Orig. Description of Change Date Pyrs Cmcc

CY7C68013A specifications

The Cypress CY7C68013A is a high-performance USB microcontroller that belongs to Cypress's FX2LP family, specifically designed for USB applications. This microcontroller is well-regarded for its versatility, making it a popular choice for developers engaged in USB-enabled projects.

One of the main features of the CY7C68013A is its ability to support USB 2.0, with both high-speed (480 Mbps) and full-speed (12 Mbps) operation. This capability allows developers to take full advantage of the USB interface for data transfer, making it suitable for applications that require fast and efficient data communication. The device integrates a USB controller along with an 8051-compatible microcontroller, providing a seamless interface for USB transactions while also allowing for custom processing tasks.

The CY7C68013A offers 32 KB of internal RAM, which is a valuable resource for data buffering and temporary storage during data transfer operations. Additionally, it includes a programmable 8-bit I/O interface, which can be tailored to various application needs, facilitating control over peripheral devices. The microcontroller also features a 16-bit address bus and a 16-bit data bus, enhancing its ability to interface with external memory and components.

In terms of development, moving from concept to production becomes easier due to the availability of development kits and software support. The CY7C68013A is compatible with Cypress's EZ-USB development environment, which includes APIs and libraries that simplify the coding process. This software support empowers developers to create sophisticated USB-related applications without needing extensive background knowledge in USB protocol intricacies.

Regarding power efficiency, the CY7C68013A operates at low power consumption levels, making it suitable for battery-operated devices. It supports various low-power modes, which further enhances its appeal for portable applications.

Overall, the Cypress CY7C68013A stands out for its robust features, flexibility, and ease of use, making it an ideal choice for engineers working on USB-centric designs. Its combination of high-speed USB functionality, ample internal resources, and strong software support positions it as a go-to microcontroller for a wide variety of applications, ranging from consumer electronics to industrial systems.