Arm Enterprises IM-AD1 manual Table A-4 J7 connector pinout Signal Pin, CLK1

Page 83

Signal Descriptions

Table A-4 shows the pinout of the logic analyzer connector.

Table A-4 J7 connector pinout

Signal

Pin

Pin

Signal

 

 

 

 

No connect

1

2

No connect

 

 

 

 

GND

3

4

No connect

 

 

 

 

SYSCLK

5

6

CLK_1

 

 

 

 

B31

7

8

B15

 

 

 

 

B30

9

10

B14

 

 

 

 

B29

11

12

B13

 

 

 

 

B28

13

14

B12

 

 

 

 

B27

15

16

B11

 

 

 

 

B26

17

18

B10

 

 

 

 

B25

19

20

B9

 

 

 

 

B24

21

22

B8

 

 

 

 

B23

23

24

B7

 

 

 

 

B22

25

26

B6

 

 

 

 

B21

27

28

B5

 

 

 

 

B20

29

30

B4

 

 

 

 

B19

31

32

B3

 

 

 

 

B18

33

34

B2

 

 

 

 

B17

35

36

B1

 

 

 

 

B16

37

38

B0

 

 

 

 

ARM DUI 0163B

Copyright © 2001-2003. All rights reserved.

A-9

Image 83
Contents Integrator/IM-AD1 User Guide Integrator/IM-AD1Conformance Notices Copyright 2001-2003. All rights reserved Chapter Introduction Integrator/IM-AD1 User GuideAppendix a Signal Descriptions Preface Intended audience Using this bookAbout this book ARM publications Typographical conventionsFurther reading Third-party documents Feedback on the Integrator/IM-AD1 FeedbackFeedback on this document Xii Introduction ARM DUI 0163B About the Integrator/IM-AD1Integrator/IM-AD1 layout Features Interface module features and architectureArchitecture Integrator/IM-AD1 block diagramLinks and LEDs Config LEDCare of modules Introduction Copyright 2001-2003. All rights reserved Getting Started Assembled Integrator development system Fitting the interface moduleSwitch 2 Closed Switch 3 Open Switch 4 Open Setting up the logic moduleRunning the test software Hardware Reference Hardware Reference Description Serial interface signal assignment Signal nameConnector Uart interfaceSerial connector signal assignment Pin J18 Type Description Serial connector pinoutSPI SPI signals SignalPWM interface PWM interface signals SignalPWM connector signals Pin J14 J10 Description Shows the signal assignmentFunctional description Stepper motor interfaceTherefore, with a 0.1Ω sense resistor fitted Stepper motor interface signal summaryStepper motor interface signals Stepper motor connectorsVSS Stepper motor connector signals Pin J19 J23 DescriptionGpio Gpio connectors J16 and J17Hardware Reference Buffer Can interfaceU13 Can interface signal assignment Signal IMBBANK30 IMBBANK28IMBBANK29 GND Can connector signal assignments Pin10 ADC and DAC interface architecture ADC and DAC interfacesIMABANK51 IMABANK48IMABANK49 IMABANK5011shows the pinout of the ADC interface connector J1 12 shows the pinout of the DAC interface connector J2 Hardware Reference Copyright 2001-2003. All rights reserved Reference Design Example Example architecture About the design exampleAbout PrimeCells File Description Vhdl file descriptionsExample memory map Integrator system memory map Address assignment of logic modulesIntegrator/IM-AD1 memory map Device Address Integrator/IM-AD1 memory mapLogic module addresses Position Bits Stack Ssram StepperbGpioa GpiobOffset address Name Type Function Example APB register peripheralLogic module registers Oscillator divisor registers VDW LMOSCx registers Bits Name Access FunctionRDW Push button interrupt register Bits Name Access FunctionOscillator lock register User LEDs control registerSwitches register Uart SPICS0 SPI chip select registerSPICS2 SPICS1Synchronous serial port PWM controller Count Offset Name Access Function AddressStepper motor peripheral ContStepper x control register DIR DocountSinglestep Stepx speed register Stepx count registerRead data input register Read data output pinsAddress offset Name Access Size Function Data output set registerGpio direction control 1 bit Data directionSsram interface CAN1 Vectored interrupt controllerInterrupt sources Interrupt Interrupt source Source numberReference Design Example CANxBase Can reset control registerCanreset Can controller interfaceADC2BUSY ADC and DAC interface16 ADC and DAC interface registers AdcstatusBits Name Function Peripheral information block18 PIB entry format Signal Descriptions Expa Pin label Signal Description Table A-1 AHB signal assignmentExpb Pin label Name Description Table A-2 Expb signal descriptionExpim LM-EP20K1000E Description Table A-3 Expim signal descriptionsLabel Figure A-4 J7 pin locations Logic analyzer connectorCLK1 Table A-4 J7 connector pinout Signal PinMulti-ICE Jtag Figure A-5 Multi-ICE connector pinoutMechanical Specification Mechanical information Figure B-1 Board dimensions top viewFigure B-2 Bottom board dimensions viewed from top side DB9STRAIGHT FCI Connector referenceDB9DUAL Multi-ICE GlossarySynchronous Serial Port Gpio IndexADC Can DACLmleds Lmlock LMOSC1 Expa A-2Gpiodataclr Gpiodatain Gpiodataout Gpiodataset Gpiodirn