Arm Enterprises IM-AD1 manual IMBBANK28, IMBBANK29, IMBBANK30

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Hardware Reference

Table 3-8 CAN interface signal assignment (continued)

	Signal	EXPIM	Description
	Signal	connector	Description
		connector

	CAN2_nINT	IM_BBANK28	CAN2 interrupt

	CAN1_RXD	IM_BBANK29	CAN1 receive data

	CAN2_RXD	IM_BBANK30	CAN2 receive data

You connect the CAN interfaces through the 9-pin D-type plugs J3A (top) and J3B (bottom), with CAN1 connecting to J3A.

Figure 3-9 shows the pin locations for this type of connector.

Figure 3-9 CAN connector pin locations

3-16

Copyright © 2001-2003. All rights reserved.

ARM DUI 0163B

Image 40

Contents Integrator/IM-AD1 Integrator/IM-AD1 User GuideConformance Notices Copyright 2001-2003. All rights reserved Integrator/IM-AD1 User Guide Chapter IntroductionAppendix a Signal Descriptions Preface About this book Using this bookIntended audience Further reading Typographical conventionsARM publications Third-party documents Feedback on this document FeedbackFeedback on the Integrator/IM-AD1 Xii Introduction About the Integrator/IM-AD1 ARM DUI 0163BIntegrator/IM-AD1 layout Interface module features and architecture FeaturesIntegrator/IM-AD1 block diagram ArchitectureConfig LED Links and LEDsCare of modules Introduction Copyright 2001-2003. All rights reserved Getting Started Fitting the interface module Assembled Integrator development systemSetting up the logic module Switch 2 Closed Switch 3 Open Switch 4 OpenRunning the test software Hardware Reference Hardware Reference Serial interface signal assignment Signal name ConnectorUart interface DescriptionSerial connector pinout Serial connector signal assignment Pin J18 Type DescriptionSPI signals Signal SPIPWM interface signals Signal PWM interfaceShows the signal assignment PWM connector signals Pin J14 J10 DescriptionStepper motor interface Functional descriptionStepper motor interface signal summary Therefore, with a 0.1Ω sense resistor fittedStepper motor connectors Stepper motor interface signalsStepper motor connector signals Pin J19 J23 Description VSSGpio connectors J16 and J17 GpioHardware Reference U13 Can interfaceBuffer Can interface signal assignment Signal IMBBANK29 IMBBANK28IMBBANK30 Can connector signal assignments Pin GNDADC and DAC interfaces 10 ADC and DAC interface architectureIMABANK48 IMABANK49IMABANK50 IMABANK5111shows the pinout of the ADC interface connector J1 12 shows the pinout of the DAC interface connector J2 Hardware Reference Copyright 2001-2003. All rights reserved Reference Design Example About PrimeCells About the design exampleExample architecture Vhdl file descriptions File DescriptionExample memory map Address assignment of logic modules Integrator system memory mapLogic module addresses Position Bits Stack Integrator/IM-AD1 memory mapIntegrator/IM-AD1 memory map Device Address Stepperb GpioaGpiob SsramLogic module registers Example APB register peripheralOffset address Name Type Function Oscillator divisor registers RDW LMOSCx registers Bits Name Access FunctionVDW Bits Name Access Function Oscillator lock registerUser LEDs control register Push button interrupt registerSwitches register Uart SPI chip select register SPICS2SPICS1 SPICS0Synchronous serial port PWM controller Offset Name Access Function Address Stepper motor peripheralCont CountStepper x control register Singlestep DocountDIR Stepx count register Stepx speed registerRead data output pins Address offset Name Access Size FunctionData output set register Read data input registerData direction Gpio direction control 1 bitSsram interface Vectored interrupt controller Interrupt sourcesInterrupt Interrupt source Source number CAN1Reference Design Example Can reset control register CanresetCan controller interface CANxBaseADC and DAC interface 16 ADC and DAC interface registersAdcstatus ADC2BUSY18 PIB entry format Peripheral information blockBits Name Function Signal Descriptions Expa Table A-1 AHB signal assignment Pin label Signal DescriptionExpb Table A-2 Expb signal description Pin label Name DescriptionExpim Label Table A-3 Expim signal descriptionsLM-EP20K1000E Description Logic analyzer connector Figure A-4 J7 pin locationsTable A-4 J7 connector pinout Signal Pin CLK1Figure A-5 Multi-ICE connector pinout Multi-ICE JtagMechanical Specification Figure B-1 Board dimensions top view Mechanical informationFigure B-2 Bottom board dimensions viewed from top side DB9DUAL Connector referenceDB9STRAIGHT FCI Glossary Multi-ICESynchronous Serial Port Index ADC CanDAC GpioGpiodataclr Gpiodatain Gpiodataout Gpiodataset Gpiodirn Expa A-2Lmleds Lmlock LMOSC1