Arm Enterprises IM-AD1 manual Typographical conventions, Further reading, ARM publications

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Preface

Typographical conventions

The following typographical conventions are used in this book:

italic

Highlights important notes, introduces special terminology,

 

denotes internal cross-references, and citations.

bold

Highlights interface elements, such as menu names. Denotes

 

ARM processor signal names. Also used for terms in descriptive

 

lists, where appropriate.

monospace

Denotes text that can be entered at the keyboard, such as

 

commands, file and program names, and source code.

monospace

Denotes a permitted abbreviation for a command or option. The

 

underlined text can be entered instead of the full command or

 

option name.

monospace italic

Denotes arguments to commands and functions where the

 

argument is to be replaced by a specific value.

monospace bold

Denotes language keywords when used outside example code.

Further reading

This section lists publications from both ARM Limited and third parties that provide additional information on developing code for the ARM family of processors.

ARM periodically provides updates and corrections to its documentation. See

http://www.arm.com for current errata sheets and addenda.

See also the ARM Frequently Asked Questions list on the ARM web site.

ARM publications

The following documents provide information about related Integrator products:

ARM Integrator/AP User Guide (ARM DUI 0098)

ARM Integrator/CM9x6E-S User Guide (ARM DUI 0138)

ARM Integrator/CM920T-ETM User Guide (ARM DUI 0149)

ARM Integrator/CM9x0T and CM7x0T User Guide (ARM DUI 0157)

ARM Integrator/CM7TDMI User Guide (ARM DUI 0126)

ARM Integrator/LM-XCV600E+ and LM-EP20K600E+ User Guide (ARM DUI 0146).

ARM DUI 0163B

Copyright © 2001-2003. All rights reserved.

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Contents Integrator/IM-AD1 User Guide Integrator/IM-AD1Conformance Notices Copyright 2001-2003. All rights reserved Chapter Introduction Integrator/IM-AD1 User GuideAppendix a Signal Descriptions Preface Using this book About this bookIntended audience Typographical conventions Further readingARM publications Third-party documents Feedback Feedback on this documentFeedback on the Integrator/IM-AD1 Xii Introduction ARM DUI 0163B About the Integrator/IM-AD1Integrator/IM-AD1 layout Features Interface module features and architectureArchitecture Integrator/IM-AD1 block diagramLinks and LEDs Config LEDCare of modules Introduction Copyright 2001-2003. All rights reserved Getting Started Assembled Integrator development system Fitting the interface moduleSwitch 2 Closed Switch 3 Open Switch 4 Open Setting up the logic moduleRunning the test software Hardware Reference Hardware Reference Connector Serial interface signal assignment Signal nameUart interface DescriptionSerial connector signal assignment Pin J18 Type Description Serial connector pinoutSPI SPI signals SignalPWM interface PWM interface signals SignalPWM connector signals Pin J14 J10 Description Shows the signal assignmentFunctional description Stepper motor interfaceTherefore, with a 0.1Ω sense resistor fitted Stepper motor interface signal summaryStepper motor interface signals Stepper motor connectorsVSS Stepper motor connector signals Pin J19 J23 DescriptionGpio Gpio connectors J16 and J17Hardware Reference Can interface U13Buffer Can interface signal assignment Signal IMBBANK28 IMBBANK29IMBBANK30 GND Can connector signal assignments Pin10 ADC and DAC interface architecture ADC and DAC interfacesIMABANK49 IMABANK48IMABANK50 IMABANK5111shows the pinout of the ADC interface connector J1 12 shows the pinout of the DAC interface connector J2 Hardware Reference Copyright 2001-2003. All rights reserved Reference Design Example About the design example About PrimeCellsExample architecture File Description Vhdl file descriptionsExample memory map Integrator system memory map Address assignment of logic modulesIntegrator/IM-AD1 memory map Logic module addresses Position Bits StackIntegrator/IM-AD1 memory map Device Address Gpioa StepperbGpiob SsramExample APB register peripheral Logic module registersOffset address Name Type Function Oscillator divisor registers LMOSCx registers Bits Name Access Function RDWVDW Oscillator lock register Bits Name Access FunctionUser LEDs control register Push button interrupt registerSwitches register Uart SPICS2 SPI chip select registerSPICS1 SPICS0Synchronous serial port PWM controller Stepper motor peripheral Offset Name Access Function AddressCont CountStepper x control register Docount SinglestepDIR Stepx speed register Stepx count registerAddress offset Name Access Size Function Read data output pinsData output set register Read data input registerGpio direction control 1 bit Data directionSsram interface Interrupt sources Vectored interrupt controllerInterrupt Interrupt source Source number CAN1Reference Design Example Canreset Can reset control registerCan controller interface CANxBase16 ADC and DAC interface registers ADC and DAC interfaceAdcstatus ADC2BUSYPeripheral information block 18 PIB entry formatBits Name Function Signal Descriptions Expa Pin label Signal Description Table A-1 AHB signal assignmentExpb Pin label Name Description Table A-2 Expb signal descriptionExpim Table A-3 Expim signal descriptions LabelLM-EP20K1000E Description Figure A-4 J7 pin locations Logic analyzer connectorCLK1 Table A-4 J7 connector pinout Signal PinMulti-ICE Jtag Figure A-5 Multi-ICE connector pinoutMechanical Specification Mechanical information Figure B-1 Board dimensions top viewFigure B-2 Bottom board dimensions viewed from top side Connector reference DB9DUALDB9STRAIGHT FCI Multi-ICE GlossarySynchronous Serial Port ADC Can IndexDAC GpioExpa A-2 Gpiodataclr Gpiodatain Gpiodataout Gpiodataset GpiodirnLmleds Lmlock LMOSC1