Motorola MVME197LE user manual Preface, Document Terminology

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Preface

This document provides general information, hardware preparation and installation instructions, operating instructions, and a functional description for the MVME197LE Single Board Computer.

This document is intended for anyone who wants to design OEM systems, supply additional capability to an existing compatible system, or work in a lab environment for experimental purposes.

A basic knowledge of computers and digital logic is assumed.

To use this document, you may wish to become familiar with the publications listed in the Related Documentation section found in the following pages.

Document Terminology

Throughout this document, a convention has been maintained whereby data and address parameters are preceded by a character which specifies the numeric format, as follows:

$	dollar	specifies a hexadecimal number
%	percent	specifies a binary number
&	ampersand	specifies a decimal number

For example, “12” is the decimal number twelve, and “$12” is the decimal number eighteen. Unless otherwise specified, all address references are in hexadecimal throughout this document.

An asterisk (*) following the signal name for signals which are level significant denotes that the signal is true or valid when the signal is low.

An asterisk (*) following the signal name for signals which are edge significant denotes that the actions initiated by that signal occur on high to low transition.

In this document, assertion and negation are used to specify forcing a signal to a particular state. In particular, assertion and assert refer to a signal that is active or true; negation and negate indicate a signal that is inactive or false. These terms are used independently of the voltage level (high or low) that they represent.

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Contents MVME197LE/D2 MVME197LERestricted Rights Legend Document Terminology PrefaceBIT Document Title Motorola Publication Number Related DocumentationPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv General Description IntroductionOte FeaturesSpecifications MVME197LE SpecificationsCharacteristics Specifications Cooling Requirements FCC Compliance Equipment RequiredSupport Information Hardware Preparation Unpacking InstructionsHardware Preparation and Installation VMEbus Connector P1 Configuration Switches Switch S1Configuration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Installation Instructions Switch S6Connectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Controls and Indicators Abort Switch S2Reset Switch S3 Front Panel Indicators DS1-DS6 Memory MapsProcessor Bus Memory Map Processor Bus Memory Map Local Devices Memory Map Address Range Devices Accessed Port SizeDetailed I/O Memory Maps 110 BusSwitch Register Memory Map100 108Memory Maps ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER Ecdm CSR Register Memory MapDcam I2C Register Memory Map Dcam I2C Base Address = $C0 default OffsetOperating Instructions Offset VMEchip2 Memory Map Sheet 1Operating Instructions VMEchip2 Memory Map Sheet 2 Global Access BUS Watchdog Timeout Prescaler AdjustOperating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Gcsr Base Address = $FFF40100 VMEchip2 Memory Map Sheet 4Operating Instructions PCCchip2 Memory Map Printer Busy Interrupt Control Register $FFF42034 Printer Fault Interrupt Control Register $FFF42031Printer SEL Interrupt Control Register $FFF42032 Printer PE Interrupt Control Register $FFF42033Cirrus Logic CD2400 Memory Map Offsets Size Access Cirrus Logic CD2401 Serial Port Memory MapBase Address Is $FFF45000 Data Bits Address D31 D16 D15 Address Range Description Size Bytes Accesses may be 8-bit or 32-bit, but not 16-bit11 C710 Scsi Memory Map 12. MK48T08 BBRAM, TOD Clock Memory Map13. Bbram Configuration Area Memory Map 14. TOD Clock Memory MapData Bits Address Function BBRAM, TOD Clock Memory Map 0460000000470476 5000 VMEbus Accesses to the Local Peripheral BusVMEbus Memory Map 01-W3869B03ALocal Reset Operation Software InitializationMulti-MPU Programming Considerations User’s Manual MVME197LE Functional Description Data Bus StructureMC88110 MPU Functional Description Memory Array Bus Data Bus 256 BusSwitchMC88110 Address Data MUX Address Mezzanine Address BusBattery Backup RAM and Clock Flash MemoryOnboard Dram VMEbus Interface InterfacesSerial Port Interface Ethernet Interface Printer InterfaceScsi Termination Programmable Tick TimersPeripheral Resources Scsi InterfaceInterrupt Sources Watchdog TimerProcessor Bus Timeout Local Peripheral Bus TimeoutMVME197LE/D2 Functional Description EIA-232-D Interconnections Table A-1. EIA-232-D Interconnections Pin Signal Signal Name and Description Number MnemonicRing Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Numerics IndexIN-2 IN-3 Index

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