Motorola MVME197LE user manual BusSwitch Register Memory Map, 100, 108, 110, 118

Page 36

Operating Instructions

Table 3-3. BusSwitch Register Memory Map

 

BusSwitch Base Address = $FFF00000

 

 

 

 

 

Offset

 

 

 

 

 

 

 

 

 

 

3

63

56

55

48

47

32

31

16

15

0

 

 

0

CHIPID

CHIPREV

GCSR

IODATA

IODIR

 

8

 

 

 

 

 

 

 

 

 

 

 

PSAR1

 

PEAR1

PSAR2

PEAR2

10

 

 

 

 

 

 

 

PSAR3

 

PEAR3

PSAR4

PEAR4

18

 

 

 

 

 

 

 

PTR1

 

PTSR1

PTR2

PTSR2

20

 

 

 

 

 

 

 

PTR3

 

PTSR3

PTR4

PTSR4

28

 

 

 

 

 

 

 

SSAR1

 

SEAR1

SSAR2

SEAR2

30

 

 

 

 

 

 

 

SSAR3

 

SEAR3

SSAR4

SEAR4

38

 

 

 

 

 

 

 

STR1

 

STSR1

STR2

STSR2

40

 

 

 

 

 

 

 

STR3

 

STSR3

STR4

STSR4

48

 

 

 

 

 

 

 

 

PAR1

PAR2

PAR3

PAR4

SAR1

SAR2

SAR3

SAR4

50

 

 

 

 

 

 

 

 

 

 

 

BTIMER

PADJUST

PCOUNT

 

PAL

 

58

 

 

 

WPPA

 

WPTPA

WPPAT

 

60

 

ROMCR

 

TCTRL1

TCTRL2

LEVEL

MASK

ISEL0

ISEL1

68

 

 

 

 

 

 

 

 

ABORT

CPINT

TINT1

TINT2

WPINT

PALINT

XINT

VBASE

70

 

 

 

 

 

 

 

 

 

 

 

 

 

TCOMP1

 

 

TCOUNT1

 

78

 

 

 

 

 

 

 

 

 

 

 

TCOMP2

 

 

TCOUNT2

 

80

 

 

 

 

 

 

 

 

 

 

 

GPR1

 

 

GPR2

 

88

 

 

 

 

 

 

 

 

 

 

 

GPR3

 

 

GPR4

 

90

 

 

 

 

 

 

 

 

 

 

 

 

 

XCTAGS

 

 

 

 

 

100

 

 

 

 

 

 

 

 

 

 

 

 

 

XCCR

 

 

VECTOR1

 

108

 

 

 

 

 

 

 

 

 

 

 

VECTOR2

 

 

VECTOR3

 

110

 

 

 

 

 

 

 

 

 

 

 

VECTOR4

 

 

VECTOR5

 

118

 

 

 

 

 

 

 

 

 

 

 

VECTOR6

 

 

VECTOR7

 

 

 

 

 

 

 

 

 

 

 

 

 

3-6

User’s Manual

Image 36
Contents MVME197LE MVME197LE/D2Restricted Rights Legend Preface Document TerminologyBIT Related Documentation Document Title Motorola Publication NumberPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv Introduction General DescriptionFeatures OteSpecifications MVME197LE SpecificationsCharacteristics Specifications Cooling Requirements Equipment Required FCC ComplianceSupport Information Unpacking Instructions Hardware PreparationHardware Preparation and Installation VMEbus Connector P1 Configuration Switches Switch S1Configuration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Installation Instructions Switch S6Connectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Controls and Indicators Abort Switch S2Reset Switch S3 Front Panel Indicators DS1-DS6 Memory MapsProcessor Bus Memory Map Processor Bus Memory Map Address Range Devices Accessed Port Size Local Devices Memory MapDetailed I/O Memory Maps BusSwitch Register Memory Map 100108 110Memory Maps Ecdm CSR Register Memory Map ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTERDcam I2C Base Address = $C0 default Offset Dcam I2C Register Memory MapOperating Instructions VMEchip2 Memory Map Sheet 1 OffsetOperating Instructions Global Access BUS Watchdog Timeout Prescaler Adjust VMEchip2 Memory Map Sheet 2Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Memory Map Sheet 4 VMEchip2 Gcsr Base Address = $FFF40100Operating Instructions PCCchip2 Memory Map Printer Fault Interrupt Control Register $FFF42031 Printer SEL Interrupt Control Register $FFF42032Printer PE Interrupt Control Register $FFF42033 Printer Busy Interrupt Control Register $FFF42034Cirrus Logic CD2400 Memory Map Offsets Size Access Cirrus Logic CD2401 Serial Port Memory MapBase Address Is $FFF45000 Data Bits Address D31 D16 D15 Accesses may be 8-bit or 32-bit, but not 16-bit 11 C710 Scsi Memory Map12. MK48T08 BBRAM, TOD Clock Memory Map Address Range Description Size Bytes13. Bbram Configuration Area Memory Map 14. TOD Clock Memory MapData Bits Address Function BBRAM, TOD Clock Memory Map 0460000000470476 VMEbus Accesses to the Local Peripheral Bus VMEbus Memory Map01-W3869B03A 5000Local Reset Operation Software InitializationMulti-MPU Programming Considerations User’s Manual MVME197LE Functional Description Data Bus StructureMC88110 MPU Functional Description Bus Data Bus 256 BusSwitch MC88110 Address Data MUX AddressMezzanine Address Bus Memory ArrayBattery Backup RAM and Clock Flash MemoryOnboard Dram VMEbus Interface InterfacesSerial Port Interface Printer Interface Ethernet InterfaceProgrammable Tick Timers Peripheral ResourcesScsi Interface Scsi TerminationWatchdog Timer Processor Bus TimeoutLocal Peripheral Bus Timeout Interrupt SourcesMVME197LE/D2 Functional Description EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Table A-1. EIA-232-D InterconnectionsRing Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Index NumericsIN-2 IN-3 Index
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