Motorola MVME197LE user manual System Considerations

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Hardware Preparation and Installation

are provided in the MVME197LE, MVME197DP, and MVME197SP Single

2Board Computers Programmer’s Reference Guide). Some cable(s) are not provided with the MVME712X module and therefore, are made or provided by the user. (Motorola recommends using shielded cables for all connections to peripherals to minimize radiation). Connect the peripherals to the cable(s). Detailed information on the EIA-232-D signals supported is found in Appendix A.

g.Install any other required VMEmodules in the system.

h.Replace the chassis cover.

i.Connect the power cable to the ac power source and turn the equipment power ON.

System Considerations

The MVME197LE needs to draw power from both connectors P1 and P2 of the VMEbus backplane. Connector P2 is also used for the upper 16 bits of data for 32-bit transfers, and for the upper 8 address lines for the extended addressing mode. The MVME197LE may not operate properly without its main board connected to connectors P1 and P2 of the VMEbus backplane.

Whether the MVME197LE operates as a VMEbus master or as a VMEbus slave, it is configured for 32 bits of address and for 32 bits of data (A32/D32). However, it handles A16 or A24 devices in certain address ranges. D8 and/or D16 devices in the system must be handled by software. Refer to the memory maps in the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide.

The MVME197LE contains shared onboard DRAM whose base address is software-selectable. Both the onboard processor and off-board VMEbus devices see this local DRAM at base physical address $00000000, as programmed by the MVME197Bug firmware. This may be changed, by software, to any other base address. Refer to the MVME197LE, MVME197DP, and MVME197SP Single Board Computers Programmer’s Reference Guide for details.

If the MVME197LE tries to access off-board resources in a non-existent location, and is not the system controller, and if the system does not have a global bus timeout, the MVME197LE waits forever for the VMEbus cycle to complete. This would cause the system to hang up. There is only one situation in which the system might lack this global bus timeout: when the MVME197LE is not the system controller and there is no global bus timeout elsewhere in the system.

2-8	User’s Manual

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Contents MVME197LE MVME197LE/D2Restricted Rights Legend Preface Document TerminologyBIT Related Documentation Document Title Motorola Publication NumberPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv Introduction General DescriptionFeatures OteMVME197LE Specifications SpecificationsCharacteristics Specifications Cooling Requirements Equipment Required FCC ComplianceSupport Information Unpacking Instructions Hardware PreparationHardware Preparation and Installation VMEbus Connector P1 Switch S1 Configuration SwitchesConfiguration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Switch S6 Installation InstructionsConnectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Abort Switch S2 Controls and IndicatorsReset Switch S3 Memory Maps Front Panel Indicators DS1-DS6Processor Bus Memory Map Processor Bus Memory Map Address Range Devices Accessed Port Size Local Devices Memory MapDetailed I/O Memory Maps BusSwitch Register Memory Map 100108 110Memory Maps Ecdm CSR Register Memory Map ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTERDcam I2C Base Address = $C0 default Offset Dcam I2C Register Memory MapOperating Instructions VMEchip2 Memory Map Sheet 1 OffsetOperating Instructions Global Access BUS Watchdog Timeout Prescaler Adjust VMEchip2 Memory Map Sheet 2Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Memory Map Sheet 4 VMEchip2 Gcsr Base Address = $FFF40100Operating Instructions PCCchip2 Memory Map Printer Fault Interrupt Control Register $FFF42031 Printer SEL Interrupt Control Register $FFF42032Printer PE Interrupt Control Register $FFF42033 Printer Busy Interrupt Control Register $FFF42034Cirrus Logic CD2401 Serial Port Memory Map Cirrus Logic CD2400 Memory Map Offsets Size AccessBase Address Is $FFF45000 Data Bits Address D31 D16 D15 Accesses may be 8-bit or 32-bit, but not 16-bit 11 C710 Scsi Memory Map12. MK48T08 BBRAM, TOD Clock Memory Map Address Range Description Size Bytes14. TOD Clock Memory Map 13. Bbram Configuration Area Memory MapData Bits Address Function 0460 BBRAM, TOD Clock Memory Map000000470476 VMEbus Accesses to the Local Peripheral Bus VMEbus Memory Map01-W3869B03A 5000Software Initialization Local Reset OperationMulti-MPU Programming Considerations User’s Manual Data Bus Structure MVME197LE Functional DescriptionMC88110 MPU Functional Description Bus Data Bus 256 BusSwitch MC88110 Address Data MUX AddressMezzanine Address Bus Memory ArrayFlash Memory Battery Backup RAM and ClockOnboard Dram Interfaces VMEbus InterfaceSerial Port Interface Printer Interface Ethernet InterfaceProgrammable Tick Timers Peripheral ResourcesScsi Interface Scsi TerminationWatchdog Timer Processor Bus TimeoutLocal Peripheral Bus Timeout Interrupt SourcesMVME197LE/D2 Functional Description EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Table A-1. EIA-232-D InterconnectionsRing Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Index NumericsIN-2 IN-3 Index

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