HP 8000 tower manual Power Control, Power Button

Page 78
7.4Power Control

Power and Signal Distribution

The +12Vsb (auxilary) voltage is always produced by the power supply unit as long as the system is connected to a live AC source. When the PS On signal is asserted, the power supply unit produces the +12 Vmain, +12 Vcpu, and -12 V outputs.

The standard 240-watt and 320-watt power suppies have a 70% minimum efficiency rating at 100% of the rated load, measured while operating from 100 VAC @60 Hz and 230 VAC @ 50 Hz.

The optional high-efficiency 240-watt and 320-watt power supplies operate at the following efficiencies while operating from 100 VAC @60 Hz and 230 VAC @ 50 Hz :

100% of rated load: 85% efficient

50% of rated load: 89% efficient

20% of rated load: 87% efficient

7.4Power Control

System power is controlled through the power button and though external events.

7.4.1 Power Button

Pressing and releasing the power button applies a negative (grounding) pulse to the power control logic on the system board. The resultant action of pressing the power button depends on the state and mode of the system at that time and is described as follows:

 

 

Table 7-4.

 

 

 

Power Button Actions

 

 

 

 

 

 

System State

Pressed Power Button Results In:

 

 

Off

Negative pulse, of which the falling edge results in power control logic

 

 

 

asserting PS On signal to Power Supply Assembly, which then initializes. ACPI

 

 

 

four-second counter is not active.

 

 

 

 

 

 

On, ACPI Disabled

Negative pulse, of which the falling edge causes power control logic to

 

 

 

de-assert the PS On signal. ACPI four-second counter is not active.

 

 

 

 

 

 

On, ACPI Enabled

Pressed and Released Under Four Seconds:

 

 

 

Negative pulse, of which the falling edge causes power control logic to

 

 

 

generate SMI-, set a bit in the SMI source register, set a bit for button status,

 

 

 

and start four-second counter. Software should clear the button status bit within

 

 

 

four seconds and the Suspend state is entered. If the status bit is not cleared by

 

 

 

software in four seconds PS On is de-asserted and the power supply assembly

 

 

 

shuts down (this operation is meant as a guard if the OS is hung).

 

 

 

Pressed and Held At least Four Seconds Before Release:

 

 

 

If the button is held in for at least four seconds and then released, PS On is

 

 

 

negated, de-activating the power supply.

 

 

 

 

 

 

7-4

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Technical Reference Guide

Image 78
Contents Document Part Number Technical Reference GuideHP Compaq 8000 Elite Series Business Desktop Computers DecemberTechnical Reference Guide HP Compaq 8000 Elite Series Business Desktop ComputersFirst Edition December Document Part Number Contents 1 Introduction2 System Overview 3 Processor/Memory Subsystem 4 System Support5 Input/Output Interfaces 7 Power and Signal Distribution 6 Integrated Graphics Subsystem8 SYSTEM BIOS A Error Messages and Codes Index1.2 Additional Information Sources Introduction1.1 About this Guide 1.1.1 Online Viewing1.4.1 Special Notices 1.3 Serial Number1.4 Notational Conventions 1.4.2 ValuesAcronym or 1.5 Common Acronyms and AbbreviationsAcronyms and Abbreviations AbbreviationTable 1-1 Continued Acronym or Table 1-1 ContinuedAcronyms and Abbreviations AbbreviationAcronym or Table 1-1 ContinuedAcronyms and Abbreviations AbbreviationAcronym or Table 1-1 ContinuedAcronyms and Abbreviations AbbreviationAcronym or Table 1-1 ContinuedAcronyms and Abbreviations AbbreviationAcronym or 1-10 System Overview 2.1 Introduction2.2 Features Feature Differences by Form Factor USDT2.3 System Architecture Architectural Differences by Form FactorSystem Overview 2.3.1 Intel Processor Support 2.3.2 ChipsetChipset Components and Functionality 2.3.3 Support Components 2.3.4 System MemorySupport Component Functions 2.3.7 Universal Serial Bus Interface 2.3.5 Mass Storage2.3.6 Serial Interface 2.3.8 Network Interface Controller2.3.9 Graphics Subsystem 2.3.10 Audio SubsystemIntegrated Graphics Subsystem Statistics 2.4 Specifications 2.3.11 HP ProtectTools Embedded SecurityEnvironmental Specifications Factory Configuration Power Supply Electrical Specifications Physical Specifications2-12 Processor/Memory Subsystem 3.1 Introduction3.2 Intel Processors 3.2.1 Intel Processor Overview3.2.2 Processor Changing/Upgrading Supported Processors partial listing3.3 Memory Subsystem 3.3.1 Memory Upgrading 3.3.2 Memory Mapping and Pre-allocationMemory Socket Loading Figure 3-2. System Memory Map for maximum of 8 gigabytes Expansion AreaBase Memory 4.2 PCI Bus Overview System Support4.1 Introduction 4.2.1 PCI 2.3 Bus OperationSystem Support PCI Component Configuration AccessWired to PCI BusTransaction Protocol Layer 4.2.2 PCI Express Bus OperationSoftware/Driver Layer PCI Bus Mastering Devices4.2.4 PCI Interrupts 4.2.5 PCI Power Management Support4.2.3 Option ROM Mapping Link LayerPCI 2.3 Bus Connector Pinout 4.2.6 PCI ConnectorsPCI 2.3 Connector Figure 4-2. 32-bit, 5.0-volt PCI 2.3 Bus ConnectorPCIe Connectors PCIe Bus Connector PinoutFigure 4-3. PCIe Bus Connectors 8259 Mode 4.3 System Resources4.3.1 Interrupts APIC Mode4.3.2 Direct Memory Access PCI Interrupt Distribution4.4 Real-Time Clock and Configuration Memory 4.4.1 Clearing CMOS4.5.1 Security Functions 4.5 System Management4.4.2 Standard CMOS Locations Configuration Memory CMOS MapCable Lock Provision Power-On / Setup PasswordSetup Password I/O Interface Security4.5.2 Power Management Smart Cover Lock OptionalACPI Wake-Up Events 4.5.3 System Status 4.5.4 Thermal Sensing and CoolingSystem Operational Status LED Indications 4.6 Register Map and Miscellaneous Functions 4.6.1 System I/O MapSystem I/O Map I/O PortFunction 4.6.2 GPIO Functions ICH10 FunctionsSIO Controller Functions Input/Output Interfaces 5.1 Introduction5.2 SATA/eSATA Interfaces 5.2.1 SATA interface5.2.2 eSATA interface 5.3 Serial Interface DB-9 Serial Connector Pinout5.4.2 Enhanced Parallel Port Mode 5.4 Parallel Interface Support5.4.1 Standard Parallel Port Mode 5.4.3 Extended Capabilities Port Mode5.4.4 Parallel Interface Connector DB-25 Parallel Connector Pinoute w q - 9 8 7 6 5 4 3 2 1 g f d s a p o i u y t r 5.5 Keyboard/Pointing Device Interface 5.5.1 Keyboard Interface Operation5.5.3 Keyboard/Pointing Device Interface Connector 5.5.2 Pointing Device Interface OperationKeyboard/Pointing Device Connector Pinout 5.6.1 USB Connector 5.6 Universal Serial Bus InterfaceUSB Cable Length Data 5.6.2 USB Cable DataUSB Connector Pinout USB Color Code5.7 Audio Subsystem Figure 5-8. Audio Subsystem Functional Block Diagram5.7.1 HD Audio Controller 5.7.2 HD Audio Link Bus5.7.3 Audio Multistreaming 5.7.4 Audio Specifications The specifications for the HD Audio subsystem are listed in TableHD Audio Subsystem Specifications 5.8 Network Interface Controller 5.8.3 Power Management Support 5.8.1 Wake-On-LAN Support5.8.2 Alert Standard Format Support 5.8.4 NIC Connector 5.8.5 NIC SpecificationsTable 5-11. NIC Specifications Integrated Graphics Subsystem 6.1 Introduction6.2 Functional Description SDRAM Installed GMA 4500 Memory AllocationMaximum Memory Allocation 6.3 Display Modes 6.4 Upgrading 6.5 Monitor Connectors 6.5.1 Analog Monitor Connector6.5.2 DisplayPort Connector Figure 6-3. DisplayPort Connector, as viewed from rear of chassisIntegrated Graphics Subsystem Power and Signal Distribution 7.2 USDT Power Distribution7.1 Introduction USDT 135-Watt Power Supply Unit Specifications 7.3 SFF/CMT Power DistributionTable 7-1 lists the specifications of the external supply Figure 7-2. SFF/CMT Power Distribution and Cabling, Block DiagramSFF 240-Watt Power Supply Unit Specifications CMT 320-Watt Power Supply Unit Specifications7.4 Power Control 7.4.1 Power ButtonPower failure power supply is overloaded. Check storage Power LED IndicationsPower LED Pre-video memory error. Incompatible or incorrectly seatedPower Management Event 7.5 Power Management7.4.2 Wake Up Events Wake-On-LANPower System Power StatesPower StateDesignator 7.6 Signal DistributionSystem Board Connector, Indicator, and Switch Designations Component functionFigure 7-5 shows pinouts of headers used on the sytem boards Table 7-7. ContinuedFigure 7-3. System Board Header Pinouts 7-10 System BIOS 8.1 Introduction8.2 ROM Flashing 8.2.1 Upgrading8.2.2 Changeable Splash Screen 8.3.2 Network Boot F12 Support 8.3 Boot Functions8.3.1 Boot Device Order 8.3.3 Memory Detection and Configuration8.3.4 Boot Error Codes 8.4 Client Management Functions 8.4.1 System ID and ROM Type 8.4.2 Temperature StatusSystem ID Numbers 8.5 SMBIOS SMBIOS Functions8.6 USB Legacy Support 8.7 Management Engine FunctionsError Messages and Codes A.2 Beep/Power LED CodesA.1 Introduction A.3 Power-On Self Test POST Messages Error Messages and Codes1794--Inaccessible device attached to SATA Power-On Self Test POST MessagesError Message 1796-SATA Cabling Error1801-Microcode Patch Error A.4 System Error Messages Error Messages and CodesA.5 Memory Error Messages Memory Error MessagesTable A-4 Table A-4. Continued A.6 Keyboard Error MessagesMemory Error Messages MessageInt. test, LpBk. test., and data register failed A.7 Printer Error MessagesA.8 Video Graphics Error Messages Int. test, LpBk. test., and cntrl. register failedA.9 Diskette Drive Error Messages A.10 Serial Interface Error Messages Table A-9 Serial Interface Error MessagesA.11 Modem Communications Error Messages Table A-10 Modem Communications Error MessagesA.12 System Status Error Messages A.13 Hard Drive Error Messages Cntlr. failed to deallocate bad sectorsxx = 00, Hard drive ID test xx = 01, Hard drive format test A.14 Hard Drive Error Messages EGA Mono. graphics mode test failed A.15 Video Graphics Error MessagesA.16 Audio Error Messages Lightpen graphics test failed, no respA.17 DVD/CD-ROM Error Messages A.18 Network Interface Error MessagesA.19 SCSI Interface Error Messages 65xx-xx, 66xx-xx MessageProbable Cause A.20 Pointing Device Interface Error Messages 8601-xx A-20 Index Numerics
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