HP 8000 tower manual System Resources, Interrupts, APIC Mode

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System Support

4.3 System Resources

This section describes the availability and basic control of major subsystems, otherwise known as resource allocation or simply “system resources.” System resources are provided on a priority basis through hardware interrupts and DMA requests and grants.

4.3.1 Interrupts

The microprocessor uses two types of hardware interrupts; maskable and nonmaskable. A maskable interrupt can be enabled or disabled within the microprocessor by the use of the STI and CLI instructions. A nonmaskable interrupt cannot be masked off within the microprocessor, but may be inhibited by legacy hardware or software means external to the microprocessor.

The maskable interrupt is a hardware-generated signal used by peripheral functions within the system to get the attention of the microprocessor. Peripheral functions produce a unique INTA-H (PCI) or IRQ0-15 (ISA) signal that is routed to interrupt processing logic that asserts the interrupt (INTR-) input to the microprocessor. The microprocessor halts execution to determine the source of the interrupt and then services the peripheral as appropriate.

Most IRQs are routed through the I/O controller of the super I/O component, which provides the serializing function. A serialized interrupt stream is then routed to the ICH component.

Interrupts may be processed in one of two modes (selectable through the F10 Setup utility):

■8259 mode

■APIC mode

These modes are described in the following subsections.

8259 Mode

The 8259 mode handles interrupts IRQ0-IRQ15 in the legacy (AT-system) method using

8259-equivalent logic. If more than one interrupt is pending, the highest priority (lowest number) is processed first.

APIC Mode

The Advanced Programmable Interrupt Controller (APIC) mode provides enhanced interrupt processing with the following advantages:

■Eliminates the processor's interrupt acknowledge cycle by using a separate (APIC) bus

■Programmable interrupt priority

■Additional interrupts (total of 24)

The APIC mode accommodates eight PCI interrupt signals (PIRQA-..PIRQH-) for use by PCI devices. The PCI interrupts are evenly distributed to minimize latency and wired as shown in Table 4-5.

Technical Reference Guide

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Contents HP Compaq 8000 Elite Series Business Desktop Computers Technical Reference GuideDocument Part Number DecemberFirst Edition December Document Part Number Technical Reference GuideHP Compaq 8000 Elite Series Business Desktop Computers 2 System Overview Contents1 Introduction 5 Input/Output Interfaces 3 Processor/Memory Subsystem4 System Support 6 Integrated Graphics Subsystem 7 Power and Signal DistributionA Error Messages and Codes Index 8 SYSTEM BIOS1.1 About this Guide Introduction1.2 Additional Information Sources 1.1.1 Online Viewing1.4 Notational Conventions 1.3 Serial Number1.4.1 Special Notices 1.4.2 ValuesAcronyms and Abbreviations 1.5 Common Acronyms and AbbreviationsAcronym or AbbreviationTable 1-1 Continued Acronyms and Abbreviations Table 1-1 ContinuedAcronym or AbbreviationAcronyms and Abbreviations Table 1-1 ContinuedAcronym or AbbreviationAcronyms and Abbreviations Table 1-1 ContinuedAcronym or AbbreviationAcronyms and Abbreviations Table 1-1 ContinuedAcronym or AbbreviationAcronyms and Abbreviations 1-10 2.1 Introduction System Overview2.2 Features USDT Feature Differences by Form FactorArchitectural Differences by Form Factor 2.3 System ArchitectureTechnical Reference Guide Chipset Components and Functionality 2.3.1 Intel Processor Support2.3.2 Chipset Support Component Functions 2.3.3 Support Components2.3.4 System Memory 2.3.6 Serial Interface 2.3.5 Mass Storage2.3.7 Universal Serial Bus Interface 2.3.8 Network Interface ControllerIntegrated Graphics Subsystem Statistics 2.3.9 Graphics Subsystem2.3.10 Audio Subsystem Environmental Specifications Factory Configuration 2.4 Specifications2.3.11 HP ProtectTools Embedded Security Physical Specifications Power Supply Electrical Specifications2-12 3.1 Introduction Processor/Memory Subsystem3.2.1 Intel Processor Overview 3.2 Intel ProcessorsSupported Processors partial listing 3.2.2 Processor Changing/Upgrading3.3 Memory Subsystem Memory Socket Loading 3.3.1 Memory Upgrading3.3.2 Memory Mapping and Pre-allocation Base Memory Figure 3-2. System Memory Map for maximum of 8 gigabytesExpansion Area 4.1 Introduction System Support4.2 PCI Bus Overview 4.2.1 PCI 2.3 Bus OperationWired to PCI Component Configuration AccessSystem Support PCI BusSoftware/Driver Layer 4.2.2 PCI Express Bus OperationTransaction Protocol Layer PCI Bus Mastering Devices4.2.3 Option ROM Mapping 4.2.5 PCI Power Management Support4.2.4 PCI Interrupts Link LayerPCI 2.3 Connector 4.2.6 PCI ConnectorsPCI 2.3 Bus Connector Pinout Figure 4-2. 32-bit, 5.0-volt PCI 2.3 Bus ConnectorFigure 4-3. PCIe Bus Connectors PCIe ConnectorsPCIe Bus Connector Pinout 4.3.1 Interrupts 4.3 System Resources8259 Mode APIC ModePCI Interrupt Distribution 4.3.2 Direct Memory Access4.4.1 Clearing CMOS 4.4 Real-Time Clock and Configuration Memory4.4.2 Standard CMOS Locations 4.5 System Management4.5.1 Security Functions Configuration Memory CMOS MapSetup Password Power-On / Setup PasswordCable Lock Provision I/O Interface SecurityACPI Wake-Up Events 4.5.2 Power ManagementSmart Cover Lock Optional System Operational Status LED Indications 4.5.3 System Status4.5.4 Thermal Sensing and Cooling 4.6.1 System I/O Map 4.6 Register Map and Miscellaneous FunctionsFunction System I/O MapI/O Port SIO Controller Functions 4.6.2 GPIO FunctionsICH10 Functions 5.1 Introduction Input/Output Interfaces5.2.1 SATA interface 5.2 SATA/eSATA Interfaces5.2.2 eSATA interface DB-9 Serial Connector Pinout 5.3 Serial Interface5.4.1 Standard Parallel Port Mode 5.4 Parallel Interface Support5.4.2 Enhanced Parallel Port Mode 5.4.3 Extended Capabilities Port Modee w q - 9 8 7 6 5 4 3 2 1 g f d s a p o i u y t r 5.4.4 Parallel Interface ConnectorDB-25 Parallel Connector Pinout 5.5.1 Keyboard Interface Operation 5.5 Keyboard/Pointing Device InterfaceKeyboard/Pointing Device Connector Pinout 5.5.3 Keyboard/Pointing Device Interface Connector5.5.2 Pointing Device Interface Operation 5.6 Universal Serial Bus Interface 5.6.1 USB ConnectorUSB Connector Pinout 5.6.2 USB Cable DataUSB Cable Length Data USB Color CodeFigure 5-8. Audio Subsystem Functional Block Diagram 5.7 Audio Subsystem5.7.3 Audio Multistreaming 5.7.1 HD Audio Controller5.7.2 HD Audio Link Bus HD Audio Subsystem Specifications 5.7.4 Audio SpecificationsThe specifications for the HD Audio subsystem are listed in Table 5.8 Network Interface Controller 5.8.2 Alert Standard Format Support 5.8.3 Power Management Support5.8.1 Wake-On-LAN Support Table 5-11. NIC Specifications 5.8.4 NIC Connector5.8.5 NIC Specifications 6.1 Introduction Integrated Graphics Subsystem6.2 Functional Description Maximum Memory Allocation SDRAM InstalledGMA 4500 Memory Allocation 6.3 Display Modes 6.4 Upgrading 6.5.1 Analog Monitor Connector 6.5 Monitor ConnectorsFigure 6-3. DisplayPort Connector, as viewed from rear of chassis 6.5.2 DisplayPort ConnectorTechnical Reference Guide 7.1 Introduction Power and Signal Distribution7.2 USDT Power Distribution Table 7-1 lists the specifications of the external supply 7.3 SFF/CMT Power DistributionUSDT 135-Watt Power Supply Unit Specifications Figure 7-2. SFF/CMT Power Distribution and Cabling, Block DiagramCMT 320-Watt Power Supply Unit Specifications SFF 240-Watt Power Supply Unit Specifications7.4.1 Power Button 7.4 Power ControlPower LED Power LED IndicationsPower failure power supply is overloaded. Check storage Pre-video memory error. Incompatible or incorrectly seated7.4.2 Wake Up Events 7.5 Power ManagementPower Management Event Wake-On-LANPower System Power StatesPower StateSystem Board Connector, Indicator, and Switch Designations 7.6 Signal DistributionDesignator Component functionFigure 7-3. System Board Header Pinouts Figure 7-5 shows pinouts of headers used on the sytem boardsTable 7-7. Continued 7-10 8.1 Introduction System BIOS8.2.2 Changeable Splash Screen 8.2 ROM Flashing8.2.1 Upgrading 8.3.1 Boot Device Order 8.3 Boot Functions8.3.2 Network Boot F12 Support 8.3.3 Memory Detection and Configuration8.3.4 Boot Error Codes 8.4 Client Management Functions System ID Numbers 8.4.1 System ID and ROM Type8.4.2 Temperature Status SMBIOS Functions 8.5 SMBIOS8.7 Management Engine Functions 8.6 USB Legacy SupportA.1 Introduction Error Messages and CodesA.2 Beep/Power LED Codes Error Messages and Codes A.3 Power-On Self Test POST MessagesError Message Power-On Self Test POST Messages1794--Inaccessible device attached to SATA 1796-SATA Cabling Error1801-Microcode Patch Error Error Messages and Codes A.4 System Error MessagesTable A-4 A.5 Memory Error MessagesMemory Error Messages Memory Error Messages A.6 Keyboard Error MessagesTable A-4. Continued MessageA.8 Video Graphics Error Messages A.7 Printer Error MessagesInt. test, LpBk. test., and data register failed Int. test, LpBk. test., and cntrl. register failedA.9 Diskette Drive Error Messages Table A-9 Serial Interface Error Messages A.10 Serial Interface Error MessagesTable A-10 Modem Communications Error Messages A.11 Modem Communications Error MessagesA.12 System Status Error Messages Cntlr. failed to deallocate bad sectors A.13 Hard Drive Error Messagesxx = 00, Hard drive ID test xx = 01, Hard drive format test A.14 Hard Drive Error Messages A.16 Audio Error Messages A.15 Video Graphics Error MessagesEGA Mono. graphics mode test failed Lightpen graphics test failed, no respA.18 Network Interface Error Messages A.17 DVD/CD-ROM Error MessagesProbable Cause A.19 SCSI Interface Error Messages 65xx-xx, 66xx-xxMessage A.20 Pointing Device Interface Error Messages 8601-xx A-20 Numerics Index

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