Intel 315889-002 Dynamic Voltage Identification D-VID, Startup Sequence Timing Parameters Sheet 2

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Output Voltage Requirements

Table 2-5. Startup Sequence Timing Parameters (Sheet 2 of 2)

 

 

 

 

 

 

 

Timing

Min

Default

Max

Remarks

 

 

 

 

 

 

 

Td =

0

0.25 ms

2.5 ms

Programmable soft start ramp;

 

VccCPU rise time to final VID

Measured from 10-90% of slope

 

 

 

 

 

 

 

 

 

 

 

Te =

0.05 ms

 

3.0 ms

 

 

VccCPU to VR_READY

 

 

 

assertion time

 

 

 

 

 

 

 

 

 

 

 

Tf =

0.05 ms

 

10.0 ms

Measured from 10-90% of slope

 

Vtt rise time

 

 

 

 

 

 

 

 

 

 

 

Tg =

0

 

5.0 ms

 

 

OUTEN to Vcc_CPU rising -

 

 

 

delay time

 

 

 

 

 

 

 

 

 

 

Note:

1.Minimum delays must be selected in a manner which will guarantee compliance to voltage tolerance specifications.

2.8Dynamic Voltage Identification (D-VID) -

REQUIRED

VRM/EVRD 11.0 supports dynamic VID across the entire VID table. The VRM/EVRD must be capable of accepting voltage level changes of 12.5 mV steps every 5 µs. The low voltage state will be maintained for at least 50 µs. The worst case settling time, including line-to-line skew, for the seven VID lines is 400 ns. The VID inputs should contain circuitry to prevent false tripping or latching of VID codes during the settling time.

During a transition, the output voltage must be between the maximum voltage of the high range (“A” in Figure 2-5) and the minimum voltage of the low range (“B”). The VRM/EVRD must respond to a transition from VID-low to VID-high by regulating its Vcc output to the range defined by the new final VID code, within 50 µs of the final step. The time to move the output voltage from VID-high to VID-low will depend on the PWM controller design, the amount of system decoupling capacitance, and the processor load.

Figure 2-5shows operating states as a representative processor changes levels. The diagram assumes steady state, maximum current during the transition for ease of illustration; actual processor behavior allows for any dIcc/dt event during the transitions, depending on the code it is executing at that time. In the example, the processor begins in a high-load condition. In transitions 1-2 and 2-3, the processor prepares to switch to the low-voltage range with a transition to a low load condition, followed by an increased activity level. Transition 3-4 is a simplification of the multiple steps from the high-voltage load line to the low-voltage load line. Transition 4-5 is an example of a response to a load change during normal operation in the lower range.

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315889-002

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Contents Design Guidelines 315889-002 Contents Figures Tables315889-002 Revision History Rev # Description Rev. DateRevision Project Document State Projects Covered 315889-002 VRM/EVRD 11.0 Supported Platforms and Processors ApplicationsIntroduction and Terminology Guideline Categories Guideline CategoriesVoltage and Current Required Processor VID signal implementationOutput Voltage Requirements Time Duration s Load Line Definitions Required Icc GuidelinesCC Tolerance / Die Load Line Units Select VIDSelect, LL1, LL0 Codes Sheet 1Load Line / Processors Select Mode Voltage Tolerance RequiredVIDSelect, LL1, LL0 Codes Sheet 2 Processor VCC Overshoot Required Impedance vs. Frequency ExpectedVR BW Impedance ZLL Measurement Parameter Limits Processor Power Sequencing RequiredStability Required Timing Min Default Max Remarks Startup Sequence Timing Parameters Sheet 1Dynamic Voltage Identification D-VID Startup Sequence Timing Parameters Sheet 2Processor Transition States Polymer Overshoot at Turn-On or Turn-Off RequiredOutput Filter Capacitance Required PWL 560µF/2.5V/20%/ Oscon 22µF/6.3V/20%/ X5R /1206 Mlcc CoefficientQuantity Value / Description Quantity Value Tolerance Temperature Motherboard Socket & PackageShut-Down Response Required Control Signals Output Enable Outen RequiredOuten Specifications VID 60 SpecificationsExtended VR 10 Voltage Identification VID Table 400 mV 200 mV 100 mV 50 mV 25 mV 12.5 mVDifferential Remote Sense VOSEN+ VR 11.0 Voltage Identification VID TableLGA VID Bit Mapping LL0, LL1, VIDSelect SpecificationsLoad Line Select LL0, LL1, VIDSelect Control Signals Load Transient Effects on Input Current Input Voltage and CurrentInput Voltages Expected Input Voltage and Current Over-Current Protection OCP Expected Processor Voltage Output ProtectionOver-Voltage Protection OVP Expected Processor Voltage Output Protection Output Indicators VRReady SpecificationsVRhot# Specifications Voltage Regulator Ready VRReady RequiredLoad Indicator Output LoadCurrent VRMpres# SpecificationsVRMID# Specifications VRM Present VRMpres# ExpectedVRM 11.0 and Platform Present Detection 315889-002 VRM Connector Expected VRM Tyco/Elcon Connector KeyingVRM 11.0 Connector Part Number and Vendor Name VRM Mechanical GuidelinesVRM 11.0 Connector Pin Descriptions Name Type DescriptionMechanical Dimensions Proposed VRM 11.0 Pin AssignmentsVRM 11.0 Module and Connector Operating Temperature Proposed VRM Board Temperature RequiredNon-Operating Temperature Proposed Environmental ConditionsSafety Proposed Altitude ProposedElectrostatic Discharge Proposed Shock and Vibration ProposedManufacturing Considerations Lead Free Pb FreeManufacturing Considerations Zf Constant Output Impedance Design Introduction ProposedFigure A-2. Zf Network Plot with 1.25 mΩ Load Line Zf Constant Output Impedance Design Voltage Transient Tool VTT Zf Theory = FFT V t FFT I tVTT Zf Measurement Method ResultsZf Constant Output Impedance Design 10uF 22uF Output Decoupling Design Procedure

315889-002 specifications

The Intel 315889-002 is a highly regarded processor that has made significant contributions to the computing landscape. As part of Intel's dedicated line of CPUs, this model is engineered to deliver robust performance and efficiency for a range of applications, from personal computing to enterprise solutions. Features of the Intel 315889-002 include its multi-core architecture, which allows for better multitasking capabilities. With multiple cores working simultaneously, users can run multiple applications without experiencing noticeable lag, leading to a smoother overall experience.

One of the standout technologies incorporated in the Intel 315889-002 is Intel Turbo Boost Technology. This technology intelligently increases the processor's clock speed to enhance performance when required while ensuring energy efficiency during lighter loads. This feature is particularly beneficial in environments where performance needs can fluctuate, such as in gaming or intensive data analysis.

The processor supports a wide variety of instruction sets, enhancing its compatibility with various software and applications. Additionally, it runs on a highly efficient microarchitecture that optimizes processing cycles, reducing power consumption and heat generation. This is crucial not only for maintaining system stability but also for prolonging the lifespan of the hardware.

Another notable characteristic is its built-in security features, including Intel Software Guard Extensions (SGX) which create isolated execution environments for sensitive operations. This is particularly important in today's digital age, where data security is a top priority for both individuals and organizations.

The Intel 315889-002 is also equipped with Integrated Graphics, which offloads graphical tasks from the CPU, enabling better performance in applications that require visual rendering without needing a dedicated graphics card. This feature is ideal for users who require decent graphics capabilities without the added expense of additional hardware.

Overall, the Intel 315889-002 stands out as a well-rounded processor that combines performance, efficiency, security, and versatility. Its advanced technologies and thoughtful design make it suitable for a wide variety of users, from gamers to professionals, seeking reliable and efficient computing solutions.
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