.

 

Checkpoint

 

Description

 

 

 

 

 

 

 

23h

1.

Check validity of RTC value:

 

 

 

 

e.g. a value of 5Ah is an invalid value for RTC minute.

 

 

 

2.

Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value

 

 

 

 

instead.

 

 

 

3.

Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into

 

 

 

 

consideration of the ESCD’s legacy information.

 

 

 

4.

Onboard clock generator initialization. Disable respective clock resource to empty PCI

 

 

 

 

& DIMM slots.

 

 

 

5.

Early PCI initialization

 

 

 

 

-Enumerate PCI bus number

 

 

 

 

-Assign memory & I/O resource

 

 

 

 

-Search for a valid VGA device and VGA BIOS, and put it into C000:0

 

 

 

 

 

 

24h

Reserved

 

 

 

 

 

 

25h

Reserved

 

 

 

 

 

 

26h

Reserved

 

 

 

 

 

 

27h

Initialize INT 09 buffer

 

 

 

 

 

 

28h

Reserved

 

 

 

 

 

 

 

29h

1.

Program CPU internal MTRR (P6 & PII) for 0-640K memory address.

 

 

 

2.

Initialize the APIC for Pentium class CPU.

 

 

 

3.

Program early chipset according to CMOS setup. Example: onboard IDE controller.

 

 

 

4.

Measure CPU speed.

 

 

 

5.

Invoke video BIOS.

 

 

 

 

 

 

2Ah

Reserved

 

 

 

 

 

 

2Bh

Reserved

 

 

 

 

 

 

2Ch

Reserved

 

 

 

 

 

 

 

2Dh

1.

Initialize multi-language

 

 

 

2.

Put information on screen display, including Award title, CPU type, CPU speed...

 

 

 

 

 

 

2Eh

Reserved

 

 

 

 

 

 

2Fh

Reserved

 

 

 

 

 

 

30h

Reserved

 

 

 

 

 

 

31h

Reserved

 

 

 

 

 

 

32h

Reserved

 

 

 

 

 

 

33h

Reset keyboard except Winbond 977 series Super I/O chips.

 

 

 

 

 

 

34h

Reserved

 

 

 

 

 

 

35h

Reserved

 

 

 

 

 

 

36h

Reserved

 

 

 

 

 

 

37h

Reserved

 

 

 

 

 

 

38h

Reserved

 

 

 

 

 

 

39h

Reserved

 

 

 

 

 

 

3Ah

Reserved

 

 

 

 

 

 

3Bh

Reserved

 

 

 

 

 

 

3Ch

Test 8254.

 

 

 

 

 

 

3Dh

Reserved

 

 

 

 

 

 

3Eh

Test 8259 interrupt mask bits for channel 1

 

 

 

 

 

 

3Fh

Reserved

 

 

 

 

 

 

40h

Test 8259 interrupt mask bits for channel 2

 

 

 

 

 

 

41h

Reserved

 

 

 

 

 

 

42h

Reserved

 

 

 

 

 

 

 

 

 

 

 

93

Chapter 4

Page 102
Image 102
Acer Veriton 5600GT/5600V, Veriton 3600GT/3600V, Veriton 7600GTR/7600GT/7600V manual Checkpoint Description