Agilent Technologies manual 3.3.4. DP1400 Simultaneous Multibuffer Acquisition and Readout SMAR

3.3.4. DP1400 Simultaneous Multibuffer Acquisition and Readout (SMAR)

For this module the internal memory has a dual-port structure which can be exploited to permit simultaneous data acquisition and read out. When the special SMAR option is present the memory can be turned into a circular buffer of a chosen number of banks, between 2 and 1000. Data can be read out of one bank while data is acquired into any available free banks. This mechanism, together with sequence acquisition, helps achieve a high maximum continuous event rate in spite of interrupts due to the computer operating system. The maximum continuous event rate is the maximum value of the trigger frequency that can be accepted without the loss of any event. It will work for both 1 and 2 converter/channel modes.

3.3.5. Timing

A crystal-controlled timebase is used to clock the ADC system of the digitizers. The timebase accuracy is guaranteed as shown in the table at the beginning of this section. The digitizers also include a built-in Trigger Time Interpolator (TTI) that measures the time from the trigger point to the first sample point. This information is essential for determining the precise relation between the trigger or other event of interest and the digitized samples of the signal. The approximate TTI resolution is also given in the table at the beginning of this section.

3.3.6. Timebase Range

The timebase range defines the time period over which data is being acquired. For example, the DC110 has a standard acquisition memory of 128 Kpoints and maximum sampling rate of 1 GS/s. Therefore, at the maximum sampling rate, the digitizer can record a signal over a timebase range of up to 130 μs (approx. 130,000 points * 1 ns/point). The timebase range can be adjusted by varying the amount of acquisition memory or the sampling rate of the digitizer.

3.3.7. Combining channels

The DC135/DC140/DC241/DC241A/DC271/DC271A/DC271AR/DP235/DP240/DP1400 digitizers offer the possibility of combining the converters (and their memories) from two or four channels to analyze a single input channel. With this feature the maximum sampling rate and the maximum amount of acquisition memory can be doubled or quadrupled if all of the input channels are not of immediate interest.

3.4.Trigger

Normally the trigger settings applied to the digitizer are used to determine the time at which the device will stop acquiring data. Some models are also capable of a ‘Start on Trigger’ mode of acquisition (see the Programmer’s Guide for further details). The various trigger settings are outlined below.

3.4.1. Trigger Source

The trigger source can be a signal applied to either an Input Channel (internal triggering) or the External Trigger Input. For the DC135/DC140/DC211/DC211A/DC241/DC241A/DC271/DC271A/DC271AR modules, a standardized trigger in signal can also be routed via the PXI Bus Star Trigger line.

Most digitizers provide a separate front panel input BNC connector that can be used as an External Trigger Input. The External Input provides a fully functional trigger circuit with selectable level and slope as for the Internal Triggering source; however it does not include coupling choices nor HF, Window, and Spike Stretcher triggers. The external trigger termination (1 MΩ or 50 Ω) is also selectable on many modules. In modules with this feature, the circuit also provides an overload protection that will automatically switch the coupling from 50 Ω to 1 MΩ if the signal is greater than ±5 V DC.

The DC271-FAMILY digitizers have a fixed 50 Ω termination impedance. They also allow the same BW limiter selections as can be found for the channels. The DC271-Family digitizers' external trigger circuit has diode protection against overload.

The DP1400 also gives the choice of 50 Ω or 1 MΩ termination impedance for the MCX external input and has diode protection against overload. However, there are no BW limiters and only DC trigger coupling is available.

In all 50 Ω cases a ±5 V limit on trigger signals should be respected, although somewhat higher voltages for short time periods will not damage the unit. For 1 MΩ input signals up to ±100 V (DC + peak AC < 10 KHz) are allowed.

User Manual: Family of 8-bit Digitizers Page 34 of 66