AMD 10 manual Nmi

31994A —1August 2004

AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet

Table 27. Acronyms (continued)

	Abbreviation		Meaning
	LAN		Large Area Network
	LRU		Least-Recently Used
	LVTTL		Low Voltage Transistor Transistor Logic
	MSB		Most Significant Bit
	MTRR		Memory Type and Range Registers
	MUX		Multiplexer
	NMI		Non-Maskable Interrupt
	OD		Open-Drain
	OPGA		Organic Pin Grid Array
	PBGA		Plastic Ball Grid Array
	PA		Physical Address
	PCI		Peripheral Component Interconnect
	PDE		Page Directory Entry
	PDT		Page Directory Table
	PGA		Pin Grid Array
	PLL		Phase Locked Loop
	PMSM		Power Management State Machine
	POS		Power-On Suspend
	POST		Power-On Self-Test
	RAM		Random Access Memory
	ROM		Read Only Memory
	RXA		Read Acknowledge Queue
	SCSI		Small Computer System Interface
	SDI		System DRAM Interface
	SDRAM	Synchronous Direct Random Access Memory
	SIMD		Single Instruction Multiple Data
	SIP		Serial Initialization Packet
	SMbus		System Management Bus
	SPD		Serial Presence Detect
	SRAM		Synchronous Random Access Memory
	SROM		Serial Read Only Memory
	TLB		Translation Lookaside Buffer
	TOM		Top of Memory
	TTL		Transistor Transistor Logic
Appendix B - Conventions and Abbreviations			87