CY7C63413C
CY7C63513C
CY7C63613C
Document #: 38-08027 Rev. *B Page 26 of 32
Notes:
9. Per Table 7-7 of revision 1.1 of USB specification, for CLOAD of 50–600 pF.
10.Measured as largest step size vs. nominal according to measured full scale and zero programmed values.
11.T ratio = Isink1[1:0](n)/Isink0[7:2](n) for the same n, programmed.
12.Irange: Isinkn(15)/ Isinkn(0) for the same pin.
13.Measured at crossover point of differential data signals.
14.Limits total bus capacitance loading (CLOAD) to 400 pF per section 7.1.5 of revision 1.1 of USB specification.
15.DAC I/O Port not bonded out on CY7C63613C. See note on page 12 for firmware code needed for unused pins.
VHInput Hysteresis Voltage 6% 12% VCC All ports, HIGH to LOW edge
Iol Sink Current 7.2 16.5 mA Port 3, Vout = 1.0V (note 4)
Iol Sink Current 3.5 10.6 mA Port 0,1,2, Vout = 2.0V (note 4)
Ioh Source Current 1.4 7.5 mA Voh = 2.4V (all ports 0,1,2,3) (note 4)
DAC Interface
Rup Pull-up Resistance 8.0K 20.0K Ohms (note 14)
Isink0(0) DAC[7:2] Sink Current (0)[15] 0.1 0.3 mA Vout = 2.0 VDC (note 5)
Isink0(F) DAC[7:2] Sink Current (F)[15] 0.5 1.5 mA Vout = 2.0 DC (note 5)
Isink1(0) DAC[1:0] Sink Current (0)[15] 1.6 4.8 mA Vout = 2.0 VDC (note 5)
Isink1(F) DAC[1:0] Sink Current (F)[15] 8 24 mA Vout = 2.0 VDC (note 5)
Irange Programmed Isink Ratio: max/min 4 6 Vout = 2.0 VDC (notes 5,12)
Ilin Differential Nonlinearity 0.5 lsb Any pin (note 10)
tsink Current Sink Response Time 0.8 µs Full scale transition
Tratio Tracking Ratio DAC[1:0] to DAC[7:2] 14 21 Vout = 2.0V (note 11)
Switching Characteristics
Parameter Description Min. Max. Unit Conditions
Clock
tCYC Input Clock Cycle Time 165.0 168.3 ns
tCH Clock HIGH Time 0.45 tCYC ns
tCL Clock LOW Time 0.45 tCYC ns
USB Driver Characteristics
trTransition Rise Time 75 ns CLoad = 50 pF[5, 9]
trTransition Rise Time 300 ns CLoad = 600 pF 5, 9]
tfTransition Fall Time 75 ns CLoad = 50 pF[5, 9]
tfTransition Fall Time 300 ns CLoad = 600 pF[5, 9]
trfm Rise/Fall Time Matching 80 125 % tr/tf[5, 9]
Vcrs Output Signal Crossover Voltage 1.3 2.0 V Notes 5 and 9
USB Data Timing
tdrate Low Speed Data Rate 1.4775 1.5225 Mbs Ave. Bit Rate (1.5 Mb/s ± 1.5%)
tdjr1 Receiver Data Jitter Tolerance –75 75 ns To Next Transition[13]
tdjr2 Receiver Data Jitter Tolerance –45 45 ns For Paired Transitions[13]
tdeop Differential to EOP Transition Skew –40 100 ns Note 6
teopr1 EOP Width at Receiver 330 ns Rejects as EOP[13]
teopr2 EOP Width at Receiver 675 ns Accepts as EOP[13]
teopt Source EOP Width 1.25 1.50 µs
tudj1 Differential Driver Jitter –95 95 ns To next transition, Figure 12
tudj2 Differential Driver Jitter –150 150 ns To paired transition, Figure 12
DC Characteristics Fosc = 6 MHz; Operating Temperature = 0 to 70°C (continued)
Parameter Min. Max. Unit Conditions
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