Manuals
/
Brands
/
Computer Equipment
/
Computer Hardware
/
Cypress
/
Computer Equipment
/
Computer Hardware
Cypress
CY7C63413C, CY7C63513C, CY7C63613C
- page 30
1
30
32
32
Download
32 pages, 1.29 Mb
CY7C63413C
CY7C63513C
CY7C63613C
Document #: 38-08027 Rev. *B
Page 30 of 32
Package Diagrams
48-Lead Shrunk Small Outline Package SP48
51-85061-*C
51-85019-*A
40-Lead(600-Mil) Molded DIP P2
[+] Feedback
Contents
Main
Low-Speed High I/O, 1.5-Mbps USB Controlle
r
CY7C63413C CY7C63513C CY7C63613C
Features
Functional Overview
Page
CY7C63413C
CY7C63513C CY7C63613C
CY7C63513C only
Vss
10
CY7C63413C
Programming Model
Pin Definitions
CY7C63513C
CY7C63413C
CY7C63513C CY7C63613C
Instruction Set Summary
CY7C63413C
CY7C63513C CY7C63613C
Memory Organization
Page
Page
Clocking
Reset
since last write to WDT for 2.048 ms
At least 8.192 ms WDR goes high Execution begins at Reset Vector 0X00
General Purpose I/O Ports
Page
CY7C63413C
CY7C63513C CY7C63613C
DAC Port
Page
USB Serial Interface Engine (SIE)
USB Device
Page
12-bit Free-running Timer
Processor Status and Control Register
1.024-ms interrupt 128-s interrupt
To Timer Register 8
Interrupts
Page
Truth Tables
Page
Table 29.Details of Modes for Differing Traffic Conditions End Point Mode PID Set End Point Mode
Setup Packet (if accepting)
Control Write
Control Read
End Point Mode PID Set End Point Mode
Out endpoint
In endpoint
Table 29.Details of Modes for Differing Traffic Conditions (continued)
Absolute Maximum Ratings
DC Characteristics
Switching Characteristics
DC Characteristics
Differential Data Lines
TPERIOD
Ordering Information
Die Pad Locations
Page
Package Diagrams
51-85025-*C
13 24
PIN1 ID
112