Cypress CY7C68013, CY7C68015A, CY7C68016A manual Slave Fifo Asynchronous Read Timing Diagram20

CY7C68013A, CY7C68014A

CY7C68015A, CY7C68016A

10.8 Slave FIFO Asynchronous Read

Figure 19. Slave FIFO Asynchronous Read Timing Diagram[20]

tRDpwh

SLRD tRDpwl

tXFLG

FLAGS

DATA

SLOE

tXFD

NN+1

tOEon tOEoff

Table 22. Slave FIFO Asynchronous Read Parameters[23]

Parameter	Description	Min	Max	Unit
tRDpwl	SLRD Pulse Width LOW	50		ns
tRDpwh	SLRD Pulse Width HIGH	50		ns
tXFLG	SLRD to FLAGS Output Propagation Delay		70	ns
tXFD	SLRD to FIFO Data Output Propagation Delay		15	ns
tOEon	SLOE Turn-on to FIFO Data Valid		10.5	ns
tOEoff	SLOE Turn-off to FIFO Data Hold		10.5	ns

Note

23. Slave FIFO asynchronous parameter values use internal IFCLK setting at 48 MHz.

Document #: 38-08032 Rev. *L Page 44 of 62

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