CY7C68013A, CY7C68014A

CY7C68015A, CY7C68016A

Figure 2. Reset Timing Plots

RESET#

RESET#

 

VIL

 

3.3V

 

3.0V

VCC

VCC

 

0V

 

TRESET

Power on Reset

VIL

3.3V

0V

TRESET

Powered Reset

Table 5. Reset Timing Values

Condition

TRESET

Power on Reset with Crystal

5 ms

 

 

Power on Reset with External

200 μs + Clock stability time

Clock

 

Powered Reset

200 μs

 

 

3.9.2 Wakeup Pins

The 8051 puts itself and the rest of the chip into a power down mode by setting PCON.0 = 1. This stops the oscillator and PLL. When WAKEUP is asserted by external logic the oscillator restarts after the PLL stabilizes, and the 8051 receives a wakeup interrupt. This applies whether or not FX2LP is connected to the USB.

The FX2LP exits the power down (USB suspend) state using one of the following methods:

USB bus activity (if D+/D– lines are left floating, noise on these lines may indicate activity to the FX2LP and initiate a wakeup)

External logic asserts the WAKEUP pin

External logic asserts the PA3/WU2 pin

The second wakeup pin, WU2, can also be configured as a general purpose IO pin. This enables a simple external R-C network to be used as a periodic wakeup source. WAKEUP is by default active LOW.

3.10 Program/Data RAM

3.10.1 Size

The FX2LP has 16 KBytes of internal program/data RAM, where PSEN#/RD# signals are internally ORed to enable the 8051 to access it as both program and data memory. No USB control registers appear in this space.

Two memory maps are shown in the following diagrams: Figure 3 on page 8 shows the Internal Code Memory, EA = 0 Figure 4 on page 9 shows the External Code Memory, EA = 1.

3.10.2 Internal Code Memory, EA = 0

This mode implements the internal 16 KByte block of RAM (starting at 0) as combined code and data memory. When external RAM or ROM is added, the external read and write strobes are suppressed for memory spaces that exist inside the chip. This enables the user to connect a 64 KByte memory without requiring address decodes to keep clear of internal memory spaces.

Only the internal 16 KBytes and scratch pad 0.5 KBytes RAM spaces have the following access:

USB download

USB upload

Setup data pointer

I2C interface boot load.

3.10.3 External Code Memory, EA = 1

The bottom 16 KBytes of program memory is external and therefore the bottom 16 KBytes of internal RAM is accessible only as a data memory.

Document #: 38-08032 Rev. *L

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Cypress CY7C68014A, CY7C68013, CY7C68015A, CY7C68016A manual Program/Data RAM, Reset Timing Values Condition

CY7C68016A, CY7C68014A, CY7C68015A, CY7C68013 specifications

The Cypress CY7C68013, CY7C68015A, CY7C68014A, and CY7C68016A are part of Cypress Semiconductor's EZ-USB family of microcontrollers, known for their high performance and flexibility in USB applications. These devices are primarily used for USB interfacing and have gained popularity in various industries due to their robust features and capabilities.

One of the main features of the CY7C68013 is its Dual FIFO architecture, allowing for efficient data transfer between USB and the system memory. This feature optimizes throughput and reduces CPU overhead, making it an excellent choice for applications that require high-speed data exchange, such as video streaming, data acquisition, and industrial automation. The device is equipped with a USB 2.0 interface which supports full-speed operation at 12 Mbps, ensuring compatibility with a wide range of USB devices.

The CY7C68015A, a similar variant, offers additional memory options, providing users with the flexibility to select the necessary capacity for their specific applications. This part is particularly useful in scenarios that demand more users or higher data storage, making it ideal for complex USB peripherals like printers and multifunction devices. Moreover, it includes a unique capability of upgradeable firmware, ensuring that the device remains relevant and functional as technology evolves.

In contrast, the CY7C68014A stands out with its support for isochronous data transfers, making it suitable for real-time applications that require timely data delivery. This is particularly important in audio and video applications where delays can impact performance. The device incorporates advanced power management features, allowing it to operate efficiently both in low and high-power modes.

Lastly, the CY7C68016A integrates enhanced security features, positioning it as an ideal choice for applications that require data integrity and protection against unauthorized access. It supports various encryption standards and provides secure boot capabilities, making it suitable for secure environments such as financial transactions and sensitive data processing.

In summary, the CY7C68013, CY7C68015A, CY7C68014A, and CY7C68016A microcontrollers offer a versatile suite of features that cater to a wide array of USB applications. Their design emphasizes performance, flexibility, and security, making them essential components in today's rapidly evolving technology landscape. Whether in consumer electronics, industrial automation, or specialized applications, these devices provide the reliability and efficiency that engineers and developers require.