CY8C20x36/46/66, CY8C20396
24-Pin QFN with USB Pinout
Table 4. Pin Definitions - CY8C20396 PSoC Device [2, 3]
Pin No. | Type | Name | Description | ||
Digital | Analog | ||||
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Figure 4. CY8C20396 PSoC Device
1 | IO | I | P2[5] |
2 | IO | I | P2[3] |
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3 | IO | I | P2[1] |
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4 | IOHR | I | P1[7] I2C SCL, SPI SS |
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5 | IOHR | I | P1[5] I2C SDA, SPI MISO |
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6 | IOHR | I | P1[3] SPI CLK |
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7 | IOHR | I | P1[1] ISSP CLK, I2C SCL, SPI MOSI |
P2[5]
P2[3]
P2[1] I2C SCL, SPI SS, P1[7] I2C SDA, SPI MISO, P1[5] SPI CLK, P1[3]
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| P0[1], AI | P0[3] | P0[5] | P0[7] | P0[6] | P0[4] | |||||
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| 24 | 23 | 22 | 21 |
| 20 | 19 |
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| 1 |
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| 18 |
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| 2 |
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| QFN |
| 17 |
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| 3 |
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| 16 |
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| 4 |
| (Top View) 15 |
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| 5 |
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| 14 |
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| 6 |
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| 10 |
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| 13 |
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| 7 | 8 | 9 |
| 11 12 |
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P0[2]
P0[0]
XRES
P1[6]
P1[4], EXTCLK P1[2]
8 | Power |
| VSS | Ground | |
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9 | IO |
| I | D+ | USB D+ |
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10 | IO |
| I | D- | USB D- |
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11 | Power |
| VDD | Supply | |
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12 | IOHR |
| I | P1[0] | ISSP DATA, I2C SDA |
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13 | IOHR |
| I | P1[2] |
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14 | IOHR |
| I | P1[4] | Optional external clock input |
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| (EXTCLK) |
15 | IOHR |
| I | P1[6] |
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16 | RESET INPUT | XRES | Active high external reset with | ||
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| internal pull down |
17 | IOH |
| I | P0[0] |
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18 | IOH |
| I | P0[2] |
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19 | IOH |
| I | P0[4] |
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20 | IOH |
| I | P0[6] |
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21 | IOH |
| I | P0[7] |
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22 | IOH |
| I | P0[5] |
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23 | IOH |
| I | P0[3] | Integrating input |
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24 | IOH |
| I | P0[1] | Integrating input |
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CP | Power |
| VSS | Thermal pad must be | |
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| connected to Ground |
LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output
SCL, SPI MOSI, P1[1] | Vss USB D+ USB D- VDD DATA, I2C SDA, P1[0] |
CLK, I2C | ISSP |
ISSP |
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Document Number: | Page 10 of 34 |
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