Cypress CY8C20396, CY8C20x36, CY8C20x46, CY8C20x66 manual SSOP

CY8C20x36/46/66, CY8C20396
Document Number: 001-12696 Rev. *D Page 13 of 34
48-Pin SSOP
Table 7. Pin Definitions - CY8C20566 PSoC Device[2]
Pin No.
Digital
Analog
Name Description Figure 7. CY8C20566 PSoC Device
1IOH IO P0[7]
2IOH IO P0[5]
3IOH IO P0[3]
4IOH IO P0[1]
5IO IO P2[7]
6IO IO P2[5] XTAL Out
7IO IO P2[3] XTAL In
8IO IO P2[1]
9NC No connection
10 NC No connection
11 IO IO P4[3]
12 IO IO P4[1]
13 NC No connection
14 IO IO P3[7]
15 IO IO P3[5]
16 IO IO P3[3]
17 IO IO P3[1]
18 NC No connection
19 NC No connection
20 IOHR IO P1[7] I2C SCL, SPI SS
21 IOHR IO P1[5] I2C SDA, SPI MISO
22 IOHR IO P1[3] SPI CLK
23 IOHR IO P1[1] TC CLK[1], I2C SCL, SPI MOSI
24 VSS Ground Pin
25 IOHR IO P1[0] TC DATA[1], I2C SDA, SPI CLK
26 IOHR IO P1[2]
27 IOHR IO P1[4] EXT CLK
28 IOHR IO P1[6]
29 NC No connection
30 NC No connection
31 NC No connection
32 NC No connection
Pin No.
Digital
Analog
Name Description
33 NC No connection 41 IO IO P2[2]
34 NC No connection 42 IO IO P2[4]
35 XRES Active high external reset with internal
pull down 43 IO IO P2[6]
36 IO IO P3[0] 44 IOH IO P0[0]
37 IO IO P3[2] 45 IOH IO P0[2]
38 IO IO P3[4] 46 IOH IO P0[4]
39 IO IO P3[6] 47 IOH IO P0[6]
40 IO IO P2[0] 48 Power Vdd Power Pin
LEGEND A = Analog, I = Input, O = Output, NC = No Connection, H = 5 mA High Output Drive, R = Regulated Output Option.
SSOP
P0[7] VDD
P0[5] P0[6]
P0[3] P0[4]
P0[1] P0[2]
P2[7] P0[0]
P2[5] P2[6]
P2[3] P2[4]
P2[1] P2[2]
NC P2[0]
NC P3[6]
P4[3] P3[4]
P4[1] P3[2]
NC P3[0]
P3[7] XRES
P3[5] NC
P3[3] NC
P3[1] NC
NC NC
NC NC
P1[7] NC
P1[5] P1[6]
P1[3] P1[4]
P1[1] P1[2]
VSS P1[0]
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14
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20
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47
46
45
43
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