CY8C24123A
CY8C24223A, CY8C24423A
Document Number: 38-12028 Rev. *I Page 14 of 56
Register Reference
This section lists the registers of the CY8C24x23A PSoC device.
For detailed register information, refer the PSoC Programmable
Sytem-on-Chip Reference Manual.

Register Conventions

Abbreviations Used
The register conventions specific to this section are listed in the
following table.

Register Mapping Tables

The PSoC device has a total register address space of 512
bytes. The register space is referred to as IO space and is
divided into two banks. The XOI bit in the Flag register (CPU_F)
determines which bank the user is currently in. When the XOI bit
is set the user is in Bank 1.
Note In the following register mapping tables, blank fields are
reserved and must not be accessed.
Table 8. Abbreviations
Convention Description
R Read register or bit(s)
W Write register or bit(s)
L Logical register or bit(s)
C Clearable register or bit(s)
# Access is bit specific
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