CY8C24123A
CY8C24223A, CY8C24423A
Document Number: 38-12028 Rev. *I Page 51 of 56
Thermal Impedances Capacitance on Crystal Pins Solder Reflow Peak Temperature
The following table lists the minimum solder reflow peak temperatures to achieve good solderability.
Table 50. Thermal Impedances per Package
Package Typical θJA *
8 PDIP 123°C/W
8 SOIC 185°C/W
20 PDIP 109°C/W
20 SSOP 117 °C /W
20 SOIC 81°C/W
28 PDIP 69 °C/W
28 SSOP 101°C/W
28 SOIC 74 °C/W
32 QFN 22°C/W
* TJ = TA + POWER x θJA
Table 51. Typical Package Capacitance on Crystal Pins
Package Package Capacitance
8 PDIP 2.8 pF
8 SOIC 2.0 pF
20 PDIP 3.0 pF
20 SSOP 2.6 pF
20 SOIC 2.5 pF
28 PDIP 3.5 pF
28 SSOP 2.8 pF
28 SOIC 2.7 pF
32 QFN 2.0 pF
Table 52. Solder Reflow Peak Temperature
Package Minimum Peak Temperature* Maximum Peak Temperature
8 PDIP 240°C 260°C
8 SOIC 240°C 260°C
20 PDIP 240°C 260°C
20 SSOP 240°C 260°C
20 SOIC 220°C 260°C
28 PDIP 240°C 260°C
28 SSOP 240°C 260°C
28 SOIC 220°C 260°C
32 QFN 240°C 260°C
*Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220 ± 5oC with
Sn-Pb or 245 ± 5oC with Sn-Ag-Cu paste. Refer to the solder manufacturer specifications.
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