Operating Principles

Figure 2-14 illustrates the electrical circuit diagram.

 

Primary Circuit

 

Full Wave

Smoothing

Switching

Rectifier

Circuit

Circuit

Circuit

(Q1)

 

Filter

 

 

Fuse

 

 

AC Input

 

 

Secondary Circuit

 

Half Wave

+42 V

Rectifier

 

Circuit

 

Chopping

+5 V

Regulator

 

(IC51)

 

Photo-coupler

PC1

+42 V Line Detector

Circuit (ZD51, 81 to 86)

+42 V Line Over Current

Protection Circuit

(Q81, Q82)

+42 V Line Over Voltage

Protection Circuit

(ZD52, ZD53, ZD87, Q82, Q83)

+5 V Over Voltage

Protection Circuit

(ZD53, Q82)

Power Off Delay Circuit

 

(ZD88, C84, Q84)

Power Off Signal

 

Figure 2-14. Power Supply Circuit Diagram￿+5 VDC line over voltage protection circuit

The output voltage level of the 5 V line is monitored by a Zener diode (ZD53). If the voltage level exceeds 9 V, the status is fed back to the primary switching circuit through the transistor (Q82) and photocoupler (PC1) to cut off the +42 V line to the regulator (IC51).

￿+5 VDC line constant voltage control circuit

Voltage at +5 VDC line is controlled by the regulator IC (IC51). When the abnormal voltage at +5 VDC line is detected, the status is input to the internal comparator of the regulator to control the voltage.

￿+42 VDC line over voltage protection circuit

The output level of the +42 VDC line is monitored by the 2 Zener diodes ZD52 and ZD87. When the output level of the +42 VDC line exceeds +48 V, the switching FET operation on the primary side is stopped via the thyristor (CY52), transistor (Q81) and photocoupler (PC1).

￿+42 VDC line constant voltage control circuit

Voltage at the +42 VDC line is monitored by the Zener diodes (ZD51, ZD81ZD86). This circuit feeds back the output voltage level status through photocoupler (PC1) to the primary switching circuit to control the on/off time of the switching FET to constant output voltage level.

￿+42 VDC line overcurrent protection circuit

The output current is monitored by the transistors Q81 and Q82. When the output current is abnormally low, the status is assumed to be a short circuit and the information is fed back to the primary circuit to stop the switching FET operation.

2-14

Rev. A