Configuration and Operation
2.3Operation
This section describes how the system functions and how to use the boards.
2.3.1Functional Block Diagram
Figure 2-3 shows the functional interconnections of the ADS in a block diagram format.
Base Board
Power Connector,
Power Switch & fuse
3V regulator, CPU
Reset signal
UART1, UART2 & IrDA
UART signals
Ext.
UART
UART controller
Ethernet
port
Ethernet controller
USB series
USB OTG Transceiver
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| Addr /Data Bus | Addr /Data Bus | USBOTG signals |
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| CPU Board |
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LEDs & Buzzer | IO pins, PWM |
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NAND Flash |
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Boot mode, |
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UARTs, IrDA |
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selection |
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| OWIRE | Burst Flash |
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Silicon & Board | Decoder& Chip |
| Addr /Data bus |
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| Battery Level |
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| Measurement |
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selectlogic |
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revision register | High Speed |
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| Emulation |
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| I2C | TV Encoder connector |
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S/W readable |
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DIP switches |
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| 1.5V regulators | Base board connectors |
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Line In |
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| Audio |
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Mic In |
| Peripheral signals | Peripheral signals | CSI signals |
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CODEC |
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Speaker |
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| Expansion | Expansion | Image sensor | MMC/SD |
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Out |
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| Connector 2 | Connector 1 | connector |
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Figure 2-3. Functional Block Diagram of M9328MX21ADSE
2.3.2On-Board Memory
Figure 2-4 and Figure 2-5 show the on-board memory interface. The M9328MX21ADSE is equipped with 8M x 32-bit Burst Flash and 16M x 32-bit SDRAM. The chip selects CS0 and CS2 (CSD0) are used for Burst Flash and SDRAM chip selects, respectively.
M9328MX21ADSE User’s Manual, Rev. A
Freescale Semiconductor |