Support Information
Table 3-18. Extension Connector PE2 Signal Description (continued)
Pin(s) | Signal | Description | |
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B15 | UART2_RXD | UART2 RECEIVED DATA — Serial input signal | |
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B16 | UART2_TXD | UART2 TRANSMITTED DATA — Serial output signal | |
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C1 | GND | GROUND | |
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C2 | CSPI1_MOSI | MASTER OUT / SLAVE IN — CSPI data signal (bidirectional) | |
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C3 | CSPI1_MISO | MASTER IN / SLAVE OUT — CSPI data signal (bidirectional) | |
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C4 | CSPI1_SCLK | SERIAL CLOCK — Bidirectional | |
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C5 | CSPI1_SS0 | SLAVE SELECT 0 — CSPI signal (bidirectional) | |
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C6 | CSPI1_SS1 | SLAVE SELECT 1 — CSPI signal (bidirectional) | |
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C7 | CSPI1_SS2 | SLAVE SELECT 2 — CSPI signal (bidirectional) | |
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C8 | CSPI1_RDY | READY — CSPI serial burst trigger, active low input | |
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C9 | SSI1_CLK | SYCHRONOUS SERIAL INTERFACE TRANSMITTER CLOCK — Bidirectional, output in | |
master mode and input in slave mode | |||
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C10 | SSI1_TXD | SYCHRONOUS SERIAL INTERFACE TRANSMITTED DATA — Serial output signal | |
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C11 | SSI1_RXD | SYCHRONOUS SERIAL INTERFACE RECEIVED DATA — Serial input signal | |
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C12 | SSI1_FS | SYCHRONOUS SERIAL INTERFACE FRAME SYNC | |
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C13 | SAP_CLK | SYCHRONOUS AUDIO PORT CLOCK — Serial transmit clock, bidirectional, output in | |
master mode, input in slave mode | |||
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C14 | SAP_TXD | SYCHRONOUS AUDIO PORT TRANMITTED DATA — Serial data output | |
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C15 | B_NEXUSEVTI | BUFFERED NEXUS EVENT IN | |
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C16 | VCC | + 3 VDC power | |
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| M9328MX21ADSE User’s Manual, Rev. A |
Freescale Semiconductor |