Fujitsu MHV2080BH, MHV2100BH, MHV2040BH, MHV2060BH Device Configuration Identify data structure 2/2

Models: MHV2100BH MHV2040BH MHV2060BH MHV2080BH

1 274
Download 274 pages 5.42 Kb
Page 149
Image 149

5.3 Host Commands

Table 5.24 DEVICE CONFIGURATION IDENTIFY data structure (2/2)

Word

Value

 

Content

 

 

 

8

X ' 0015 '

Serial-ATA command set/function

 

 

Reflected in IDENTIFY information ”Word 76 to 79.

 

 

Bits 15-5:

Reserved

 

 

Bit 4:

1 = Software Settings Preservation supported

 

 

Bit 3:

1 = Asynchronous Notification supported

 

 

Bit 2:

1 = Interface power management supported

 

 

Bit 1:

1 = Non-zero buffer offsets in DMA Setup FIS supported

 

 

Bit 0:

1 = Native command queuing supported

 

 

 

9

X ' 0000 '

Reserved for Serial-ATA

 

 

 

 

10 to 254

X'0000'

Reserved

 

 

 

 

 

255

X'xxA5'

Bits 15-8:

Check sum code (This is obtained by calculating the sum of

 

 

 

all upper bytes and lower bytes in WORD 0 to 256 and the

 

 

 

byte consisting of bits 7 to 0 in WORD 255, and then

 

 

 

calculating the two's complement of the lowest byte of that

 

 

 

sum.)

 

 

Bits 7-0:

 

 

 

 

 

C141-E224

5-73

Page 149
Image 149
Fujitsu MHV2080BH, MHV2100BH, MHV2040BH, MHV2060BH manual Device Configuration Identify data structure 2/2