The host sets X'03' to the Features register. By issuing this command with setting a value to the Sector Count register, the transfer mode can be selected. Upper 5 bits of the Sector Count register defines the transfer type and lower 3 bits specifies the binary mode value.

However, the IDD can operate with the PIO transfer mode 4 and multiword DMA transfer mode 2 regardless of reception of the SET FEATURES command for transfer mode setting.

The IDD supports following values in the Sector Count register value. If other value than below is specified, an ABORTED COMMAND error is posted.

PIO default transfer mode

00000

000

(X‘00’)

PIO flow control transfer mode X

00001 000

(X‘08’: Mode 0)

 

00001

001

(X‘09’: Mode 1)

 

00001

010

(X‘0A’: Mode 2)

 

00001

011

(X‘0B’: Mode 3)

 

00001

100

(X‘0C’: Mode 4)

Multiword DMA transfer mode X

00100 000

(X‘20’: Mode 0)

 

00100

001

(X‘21’: Mode 1)

 

00100

010

(X‘22’: Mode 2)

Ultra DMA transfer mode X

01000 000

(X‘40’: Mode 0)

 

01000

001

(X‘41’: Mode 1)

 

01000

010

(X‘42’: Mode 2)

Disable IORDY

00000 001 (X‘01’: transfer mode not changed)

(15)SET MULTIPLE MODE (X'C6')

This command enables the device to perform the READ MULTIPLE and WRITE MULTIPLE commands. The block count (number of sectors in a block) for these commands are also specified by the SET MULTIPLE MODE command.

The number of sectors per block is written into the Sector Count register. The IDD supports 2, 4, 8 and 16 (sectors) as the block counts.

Upon receipt of this command, the device sets the BSY bit of the Status register and checks the contents of the Sector Count register. If the contents of the Sector Count register is valid and is a supported block count, the value is stored for all subsequent READ MULTIPLE and WRITE MULTIPLE commands. Execution of these commands is then enabled. If the value of the Sector Count register is not a supported block count, an ABORTED COMMAND error is posted and the READ MULTIPLE and WRITE MULTIPLE commands are disabled.

If the contents of the Sector Count register is 0 when the SET MULTIPLE MODE command is issued, the READ MULTIPLE and WRITE MULTIPLE commands are disabled.

When the SET MULTIPLE MODE command operation is completed, the device clears the BSY bit and generates an interrupt.

C141-E056-02EN

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Fujitsu MPC3065AH, MPC3045AH manual SET Multiple Mode XC6