Processors and Components: Monitoring and

Overview of the NonStop Blade Complex

Recovery

 

Overview of the NonStop Blade Complex

Note. This section does not apply to Integrity NonStop NS1000 systems, which use the NSVA rather than NSAA architecture (see NonStop System Architectures on page 2-2). For more information on Integrity NonStop NS1000 systems, see Differences Between Integrity NonStop NS-Series Systems on page 2-2,the NonStop NS1000 Planning Guide, or the NonStop NS1000 Hardware Installation Manual.

The basic building block of the modular NonStop advanced architecture (NSAA) compute engine is the NonStop Blade Complex, which consists of two or three processor modules called NonStop Blade Elements. Each Blade Element houses two or four microprocessors called processor elements (PEs). A logical processor consists of one processor element from each Blade Element. Although a logical processor physically consists of multiple processor elements, it is convenient to think of a logical processor as a single entity within the system. Each logical processor has its own memory, its own copy of the operating system, and processes a single instruction stream. NSAA logical processors are usually referred to simply as “processors.”

All input and output to and from each NonStop Blade Element goes through a logical synchronization unit (LSU). The LSU interfaces with the ServerNet fabrics and contains logic that compares all output operations of a logical processor, ensuring that all NonStop Blade Elements agree on the result before the data is passed to the ServerNet fabrics.

A processor with two NonStop Blade Elements comprise the dual modular redundant (DMR) NonStop Blade Complex, which is also referred to as a duplex system. This duplex system provides data integrity and system availability that is comparable to NonStop S-series systems, but at considerably faster processing speeds.

Three NonStop Blade Elements plus their associated LSUs make up the triple modular redundant (TMR) NonStop Blade Complex, which is referred to as a triplex system. The triplex system provides the same processing speeds as the duplex system while also enabling hardware fault recovery that is transparent to all but the lowest level of the NonStop operating system (OS).

In the event of a processor fault in either a duplex or triplex system, the failed component within a NonStop Blade Element (processor element, power supply, and so forth) can be replaced while the system continues to run. A single Integrity NonStop system can have up to four NonStop Blade Complexes for a total of 16 processors. Processors communicate with each other and with the system I/O over dual ServerNet fabrics.

A ServerNet fabric is a complex web of links that provide a large number of possible paths from one point to another. Two communications fabrics, the X and Y ServerNet fabrics, provide redundant, fault-tolerant communications pathways. If a hardware fault occurs on one of the ServerNet fabrics, communications continues on the other with hardware fault recovery transparent to all but the lowest level of the OS.

Figure 9-1 is an overview of the modular NSAA and shows one NonStop Blade Complex with four processors, the I/O hardware and the ServerNet fabrics.

HP Integrity NonStop NS-Series Operations Guide529869-005

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HP NonStop NS manual Overview of the NonStop Blade Complex