IBM DS8000 manual RIO-G Interconnect

To host

servers

Adapter Adapter

Processor Processor

Adapter Adapter

Storage

	L1,2
Processor	Memory	Memory
	L1,2	L3
Processor	Memory
		Memory

RIO-G Module

POWER5 2-way SMP

Figure 12-6 Standard pSeries POWER5 p570 2-way SMP processor complexes for DS8100-921

Figure 12-7provides a less abstract view and outlines some details on the dual 2-way processor complex of a DS8100-921, its gates to host servers through HAs, and its connections to the disk storage back end through the DAs.

	2 Gbps Fibre Channel ports
HA	Fibre Channel	Fibre Channel
	Protocol Proc	Protocol Proc
	PowerPC			RIO-G Module
Server 0		L1,2					Server 1
						L1,2
Memory		Memory	Processor
					Processor	Memory	Memory
	L3	L1,2		RIO-G Interconnect		L1,2	L3
		Memory	Processor
	Memory				Processor	Memory	Memory
POWER5 2-way SMP		RIO-G Module			RIO-G Module		POWER5 2-way SMP
				RIO-G Module		PowerPC
				DA
	I/O enclosure					Fibre Channel	Fibre Channel	DA
						Protocol Proc	Protocol Proc
					2 Gbps Fibre Channel ports
				4 HAs
Figure 12-7 DS8100-921 with four I/O enclosures

Each of the two processor complexes is interconnected through the pSeries-based RIO-G interconnect technology and includes up to four I/O enclosures which equally communicate to either processor complex. Note that there is some affinity between the disk subsystem and its individual ranks to either the left processor complex, server 0, or to the right processor

262DS8000 Series: Concepts and Architecture