IBM EM78P809N manual Bit Microcontroller URS − Uart Status Register Address 07h

Models: EM78P809N

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EM78P809N

8-Bit Microcontroller

URS UART Status Register ( Address: 07h )

Bit 7

Bit 6

Bit 5

Bit 4

 

 

 

 

Bit 3

Bit 2

Bit 1

Bit 0

 

 

 

URRD8

EVEN

PRE

PRERR

OVERR

FMERR

URBF

RXE

Bit 7 ( URRD8 ) : Receiving data bit 8

Bit 6 ( EVEN ) : Select parity check

EVEN = “0” : Odd parity

EVEN = “1” : Even parity

Bit 5 ( PRE ) : Enable parity addition

PRE = “0” : Disable

PRE = “1” : Enable

Bit 4 ( PRERR ) : Parity error flag.

Set to 1 when parity error occurred, and cleared to 0 by software.

Bit 3 ( OVERR ) : Overrun error flag.

Set to 1 when overrun error occurred, and cleared to 0 by software.

Bit 2 ( FMERR ) : Framing error flag.

Set to 1 when framing error occurred, and cleared to 0 by software.

Bit 1 ( URBF ) : UART read buffer full flag.

Set to 1 when one character is received. Reset to 0 automatically when read from the URS register. URBF will be cleared by hardware when receiving is enabled. URBF bit is read-only. Therefore, reading the URS register is necessary to avoid an overrun error.

Bit 0 ( RXE ) : Enable receiving

RXE = “0” : Disable

RXE = “1” : Enable

URRD UART Receive Data Buffer ( Address: 08h )

Bit 7

 

Bit 6

 

Bit 5

 

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

 

 

 

 

 

 

 

 

 

 

 

URRD7

URRD6

URRD5

 

URRD4

URRD3

URRD2

URRD1

URRD0

Bit 7 ~ Bit 0 ( URRD7 ~ URRD0 ) : UART receive data buffer. Read only.

Product Specification (V1.0) 07.26.2005

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(This specification is subject to change without further notice)

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IBM EM78P809N manual Bit Microcontroller URS − Uart Status Register Address 07h, Even = 0 Odd parity Even = 1 Even parity