Bit 2 EDS Data shift out edge select, EDS Dord WBE | IBM EM78P809N

EM78P809N

8-Bit Microcontroller

URTD − UART Transmit Data Buffer ( Address: 09h )

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

URTD 7 URTD 6 URTD 5 URTD 4 URTD 3 URTD 2 URTD 1

URTD0

Bit 7 ~ Bit 0 ( URTD 7 ~ URTD 0) : UART transmit data buffer. Write only.

Register Bank 3 ( R3 bits ( 7,6) = (1,1) )

SPIC1 − SPI Control Register 1 ( Address: 05h )

Bit 7		Bit 6		Bit 5		Bit 4
SMP		DCOL		BRS2		BRS1

Bit 3

BRS0

	Bit 2	Bit 1		Bit 0
	EDS	DORD		WBE

Bit 7 ( SMP ) : SPI data input sample phase.

SMP = “0” : Input data sampled at middle of data output time

SMP = “1” : Input data sampled at the end of data output time

In using external clock, data input sample is fixed at the middle of data output time. Bit 6 ( DCOL ) : SPI Data collision.

DCOL = “0” : Data collision didn’t occur

DCOL = “1” : Data collision occurred. It should be cleared by software. Bit 5 ~ Bit 3 ( BRS0 ~ BRS2 ) : SPI Clock Source Select

BRS2		BRS1		BRS0		Clock Source	Max. Transfer Rate
BRS2		BRS1		BRS0		( Normal, Idle )	( Fc = 8MHz )
						( Normal, Idle )	( Fc = 8MHz )

0		0		0		Fc/213	0.95Kbit/s
0		0		1		Fc/211	3.8Kbit/s
0		1		0		Fc/210	7.6Kbit/s
0		1		1		Fc/28	30.5Kbit/s
1		0		0		Fc/26	122Kbit/s
1		0		1		Fc/25	244Kbit/s
1		1		0		External clock (/SCK pin)	-

1		1		1		External clock (/SCK pin)	-

Bit 2 ( EDS ) : Data shift out edge select.

EDS = “0” : Rising edge

EDS = “1” : Falling edge

Bit 1 ( DORD ) : Data transmission order.

DORD = “0” : Shift left (MSB first)

DORD = “1” : Shift right (LSB first)

20 •	Product Specification (V1.0) 07.26.2005

(This specification is subject to change without further notice)

Image 24

IBM EM78P809N manual Bit 2 EDS Data shift out edge select, EDS = 0 Rising edge EDS = 1 Falling edge, SMP Dcol BRS2 BRS1

Contents

EM78P809N DOC. Version Elan Microelectronics Corporation Contents Specification Revision History CPU Bit Microcontroller Applications „ General purpose Pin Assignment OTP Programming Pins Functional Block Diagram Function Description Operating Registers Tbktc R1/TCC − Time Clock /Counter Address 01h R2/PC − Program Counter & Stack Address 02h R3/SR − Status Register Address 03h Bit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page selectBit 5 Not used RBS1 RBS0 Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04h GRBS1 GRBS0General Purpose Register Bank Address 20H ~ 3FH SIS = 0 Idle mode SIS = 1 Sleep mode PORT6 − Port 6 I/O Data Register Address 06hPORT7 Port 7 I/O Data Register Address 07h PORT8 − Port 8 I/O Data Register Address 08h TC4CR Timer/Counter 4 Control Register Address 0Bh TC4S = 1 StartTC4FF1 TC4FF0 TC4CK2 TC4CK1 TC4CK0 Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0Ch ISFR1 − Interrupt Status Flag Register 1 Address 0Eh Bit 7 TC3CAP Software capture control TC3CAP =TC3S = 1 Start TC3CAP TC3S TC3CK1 TC3CK0 TC3M TC3DB − Timer 3 Data Buffer B Address 07h TC2M = 1 Window modeBit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer TC2S = 1 Start TC2DH − Timer 2 Data Buffer High Byte Address 09h TC2DL − Timer 2 Data Buffer Low Byte Address 0AhAdcr − AD Control Register Address 0Bh Bit 3 ADP AD power control Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable controlAdic − AD Input Pin Control Address 0Ch Addh − AD High 8-bit Data Buffer Address 0Dh Bit 7 TEN Keytone enable control TEN = 0 Disable TEN = 1 EnableBit 3 Tbten Time Base Timer Enable Control Bit Microcontroller Tbktc − TBT/Keytone Control Address 0Eh Bit 3 Uinven Enable Uart TXD and RXD port inverse output Uinven = 0 Disable TXD and RXD port inverse outputUinven = 1 Enable TXD and RXD port inverse output Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate Select Bit 5 PRE Enable parity addition Bit Microcontroller URS − Uart Status Register Address 07hEven = 0 Odd parity Even = 1 Even parity Bit 2 EDS Data shift out edge select EDS = 0 Rising edge EDS = 1 Falling edgeSMP Dcol BRS2 BRS1 EDS Dord WBE Transfer Mode SPIC2 − SPI Control Register 2 Address 06hSpid SPI Data Buffer Address 07h SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 PLE7x = 1 Disable P7x pull low PLC1 Pull Low Control Register 1 Address 0BhPHC2 − Pull High Control Register 2 Address 0Ch PLC2 − Pull Low Control 2 Address 0Dh Special Purpose Registers AccumulatorControl Register Bit 7 Wdto WDT output select Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control Register Intcr − INT Control Register Address 0BhBit 2 Reserved INT1ES = 0 Rising edge INT1ES = 1 Falling edge INT Pin Secondary Enable Condition Function Pin External InterruptAdoscr − AD Offset Control Register Address 0Ch Edge IMR2 − Interrupt Mask Register 2 Address 0Fh Uerrie Urie Utie Tbie EXIE1 TCIE0 CPU Operation Mode Registers for CPU operation modeRbank Register Bank bits 7, 6 of R3, R/W Read/Write Rbank Mode Switching Control Operation ModeNormal AD Converter → Don’t care → Interrupt request flag will be recordedRegisters for AD Converter Circuit ADC Data Register Sampling TimeConversion Time Time Base Timer and Keytone Generator ADCK10Max. Frequency Max. Conversion Rate per Bit Tone Output Pin Timing Chart Uart Universal Asynchronous Receiver/Transmitter Registers for Uart CircuitRbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Uart Mode Data Format in Uart Transmitting Receiving SPI Serial Peripheral Interface Baud Rate GeneratorRegisters for the SPI Circuit Shift Direction and Sample Phase Transfer ModeBit Transmit Mode Serial Clock Bit Microcontroller Bit Receive Mode Bit Transmit/Receive Mode SCK pin Multiple Device Connect /SS Timer/Counter Registers for Timer/Counter 2 CircuitRbank Address Name Bit 7 Bit 6 Bit Timer Mode Counter ModeWindow Mode Window Mode Timing Chart Registers for Timer/Counter 3 Circuit Capture mode Configuration of Timer/Counter3 Registers for Timer 4 Circuit TCIF4 PDO Mode TCR4 PWM Mode 12 TCC/WDT & PrescalerTC4 Interrupt Reset and Wake-up Reset13 I/O Ports Wake-up from Sleep Mode Wake-up from Idle modeAll interrupt Address Name Reset Type Bit Summary of the Initialized Values for Registers Bit Microcontroller Register Bank SCR TC2D9 TC2D8 Register Bank Previous value before reset Reset TypeStatus of RST, T, and P of Status Register Bit Microcontroller General Purpose Registers Controller Reset Block Diagram Interrupt Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds Oscillator Type Frequency Mode C1 pF C2 pF EM78P809NExt. Clock 740 External RC Oscillator Mode Crystal/Resonator-Parallel Mode Circuit Enwdtb = 0 Enable Enwdtb = 1 Disable Code Option RegisterCode Option Register Word For design reference only Power-on Considerations External Power-on Reset CircuitCustomer ID Register Cyes = 0 One cycle Cyes = 1 Two cycles Residue-Voltage Protection VddEM78P809N Rin Vdd EM78P809N Instruction Set Vdd 40KR2 Binary Instruction Hex Mnemonic Operation Status Affected DEC Symbol Parameter Condition Min Typ Max Unit Absolute Maximum RatingsRecommended Operating Conditions Vss = DC Electrical Characteristics Ta= 25 C, VDD= 5.0V ± 5%, VSS=Typical value is based on characterization results at 25C Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V = selected prescaler ratio Timing Diagram AC Test Input/Output Waveform Package Types OTP MCUPin Count Package Size Contents III EM78P809N