IBM EM78P809N manual Binary Instruction Hex Mnemonic Operation Status Affected, Dec

EM78P809N

8-Bit Microcontroller

Binary Instruction Hex Mnemonic Operation

Status Affected

	0	0000	0000	0000	0000	NOP			No Operation	None
	0	0000	0000	0001	0001	DAA			Decimal Adjust A	C
	0	0000	0000	0010	0002	CONTW			A → CONT	None
	0	0000	0000	0011	0003	SLEP			0 → WDT, Stop oscillator	T,P
	0	0000	0000	0100	0004	WDTC			0 → WDT	T,P
	0	0000	0000	rrrr	000r	IOW	R		A → IOCR	None <Note1>
	0	0000	0001	0000	0010	ENI			Enable Interrupt	None
	0	0000	0001	0001	0011	DISI			Disable Interrupt	None
	0	0000	0001	0010	0012	RET			[Top of Stack] → PC	None
0		0000	0001	0011	0013	RETI			[Top of Stack] → PC,	None
									Enable Interrupt
	0	0000	0001	0100	0014	CONTR			CONT → A	None
	0	0000	0001	rrrr	001r	IOR	R		IOCR → A	None <Note1>
	0	0000	01rr	rrrr	00rr	MOV	R,	A	A → R	None
	0	0000	1000	0000	0080	CLRA			0 → A	Z
	0	0000	11rr	rrrr	00rr	CLR	R		0 → R	Z
	0	0001	00rr	rrrr	01rr	SUB	A,	R	R-A → A	Z,C,DC
	0	0001	01rr	rrrr	01rr	SUB	R,	A	R-A → R	Z,C,DC
	0	0001	10rr	rrrr	01rr	DECA	R		R-1 → A	Z
	0	0001	11rr	rrrr	01rr	DEC	R		R-1 → R	Z
	0	0010	00rr	rrrr	02rr	OR	A,	R	A ∨ R → A	Z
	0	0010	01rr	rrrr	02rr	OR	R,	A	A ∨ R → R	Z
	0	0010	10rr	rrrr	02rr	AND	A,	R	A & R → A	Z
	0	0010	11rr	rrrr	02rr	AND	R,	A	A & R → R	Z
	0	0011	00rr	rrrr	03rr	XOR	A,	R	A ⊕ R → A	Z
	0	0011	01rr	rrrr	03rr	XOR	R,	A	A ⊕ R → R	Z
	0	0011	10rr	rrrr	03rr	ADD	A,	R	A + R → A	Z,C,DC
	0	0011	11rr	rrrr	03rr	ADD	R,	A	A + R → R	Z,C,DC
	0	0100	00rr	rrrr	04rr	MOV	A,	R	R → A	Z
	0	0100	01rr	rrrr	04rr	MOV	R,	R	R → R	Z
	0	0100	10rr	rrrr	04rr	COMA	R		/R → A	Z
	0	0100	11rr	rrrr	04rr	COM	R		/R → R	Z
	0	0101	00rr	rrrr	05rr	INCA	R		R+1 → A	Z
	0	0101	01rr	rrrr	05rr	INC	R		R+1 → R	Z
	0	0101	10rr	rrrr	05rr	DJZA	R		R-1 → A, skip if zero	None
	0	0101	11rr	rrrr	05rr	DJZ	R		R-1 → R, skip if zero	None
0		0110	00rr	rrrr	06rr	RRCA	R		R(n) → A(n-1),	C
									R(0) → C, C → A(7)
0		0110	01rr	rrrr	06rr	RRC	R		R(n) → R(n-1),	C
									R(0) → C, C → R(7)
0		0110	10rr	rrrr	06rr	RLCA	R		R(n) → A(n+1),	C
									R(7) → C, C → A(0)
0		0110	11rr	rrrr	06rr	RLC	R		R(n) → R(n+1),	C
									R(7) → (C), C → (R(0)
0		0111	00rr	rrrr	07rr	SWAPA	R		R(0-3) → ( A(4-7),	None
									R(4-7) → ( A(0-3)
	0	0111	01rr	rrrr	07rr	SWAP	R		R(0-3) → ( R(4-7)	None
	0	0111	10rr	rrrr	07rr	JZA	R		R+1 → A, skip if zero	None
	0	0111	11rr	rrrr	07rr	JZ	R		R+1 → R, skip if zero	None
	0	100b	bbrr	rrrr	0xxx	BC	R,	b	0→ ( R(b)	None
	0	101b	bbrr	rrrr	0xxx	BS	R,	b	1→ ( R(b)	None
	0	110b	bbrr	rrrr	0xxx	JBC	R,	b	if R(b)=0, skip	None
	0	111b	bbrr	rrrr	0xxx	JBS	R,	b	if R(b)=1, skip	None
1		00kk	kkkk	kkkk	1kkk	CALL	k		PC+1 → [SP],	None
									(Page, k) → (PC)
	1	01kk	kkkk	kkkk	1kkk	JMP	k		(Page, k) → (PC)	None
	62 •								Product Specification (V1.0) 07.26.2005

(This specification is subject to change without further notice)