DOC. Version
EM78P809N
Elan Microelectronics Corporation
Contents
Specification Revision History
Bit Microcontroller
CPU
General purpose
Applications
Pin Assignment
OTP Programming Pins
Function Description
Functional Block Diagram
Tbktc
Operating Registers
R2/PC − Program Counter & Stack Address 02h
R1/TCC − Time Clock /Counter Address 01h
RBS1 RBS0
R3/SR − Status Register Address 03h
Bit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page select
Bit 5 Not used
Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04h
GRBS1 GRBS0
General Purpose Register Bank Address 20H ~ 3FH
PORT8 − Port 8 I/O Data Register Address 08h
SIS = 0 Idle mode SIS = 1 Sleep mode
PORT6 − Port 6 I/O Data Register Address 06h
PORT7 Port 7 I/O Data Register Address 07h
TC4CK2 TC4CK1 TC4CK0
TC4CR Timer/Counter 4 Control Register Address 0Bh
TC4S = 1 Start
TC4FF1 TC4FF0
ISFR1 − Interrupt Status Flag Register 1 Address 0Eh
Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0Ch
TC3CAP TC3S TC3CK1 TC3CK0 TC3M
Bit 7 TC3CAP Software capture control
TC3CAP =
TC3S = 1 Start
TC2S = 1 Start
TC3DB − Timer 3 Data Buffer B Address 07h
TC2M = 1 Window mode
Bit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer
TC2DH − Timer 2 Data Buffer High Byte Address 09h
TC2DL − Timer 2 Data Buffer Low Byte Address 0Ah
Adcr − AD Control Register Address 0Bh
Addh − AD High 8-bit Data Buffer Address 0Dh
Bit 3 ADP AD power control
Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable control
Adic − AD Input Pin Control Address 0Ch
Bit Microcontroller Tbktc − TBT/Keytone Control Address 0Eh
Bit 7 TEN Keytone enable control
TEN = 0 Disable TEN = 1 Enable
Bit 3 Tbten Time Base Timer Enable Control
Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate Select
Bit 3 Uinven Enable Uart TXD and RXD port inverse output
Uinven = 0 Disable TXD and RXD port inverse output
Uinven = 1 Enable TXD and RXD port inverse output
Bit 5 PRE Enable parity addition
Bit Microcontroller URS − Uart Status Register Address 07h
Even = 0 Odd parity Even = 1 Even parity
EDS Dord WBE
Bit 2 EDS Data shift out edge select
EDS = 0 Rising edge EDS = 1 Falling edge
SMP Dcol BRS2 BRS1
SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0
Transfer Mode
SPIC2 − SPI Control Register 2 Address 06h
Spid SPI Data Buffer Address 07h
PLC2 − Pull Low Control 2 Address 0Dh
PLE7x = 1 Disable P7x pull low
PLC1 Pull Low Control Register 1 Address 0Bh
PHC2 − Pull High Control Register 2 Address 0Ch
Bit 7 Wdto WDT output select
Special Purpose Registers
Accumulator
Control Register
INT1ES = 0 Rising edge INT1ES = 1 Falling edge
Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control Register
Intcr − INT Control Register Address 0Bh
Bit 2 Reserved
Edge
INT Pin Secondary Enable Condition Function Pin
External Interrupt
Adoscr − AD Offset Control Register Address 0Ch
Uerrie Urie Utie Tbie EXIE1 TCIE0
IMR2 − Interrupt Mask Register 2 Address 0Fh
Rbank
CPU Operation Mode
Registers for CPU operation mode
Rbank Register Bank bits 7, 6 of R3, R/W Read/Write
Mode Switching Control
Operation Mode
Normal
AD Converter
→ Don’t care → Interrupt request flag will be recorded
Registers for AD Converter Circuit
ADC Data Register
Sampling Time
Conversion Time
Time Base Timer and Keytone Generator
ADCK10
Max. Frequency Max. Conversion Rate per Bit
Tone Output Pin Timing Chart
Uart Universal Asynchronous Receiver/Transmitter
Registers for Uart Circuit
Rbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit
Data Format in Uart
Uart Mode
Receiving
Transmitting
SPI Serial Peripheral Interface
Baud Rate Generator
Registers for the SPI Circuit
Serial Clock
Shift Direction and Sample Phase
Transfer Mode
Bit Transmit Mode
Bit Transmit/Receive Mode
Bit Microcontroller Bit Receive Mode
Multiple Device Connect /SS
SCK pin
Timer/Counter
Registers for Timer/Counter 2 Circuit
Rbank Address Name Bit 7 Bit 6 Bit
Timer Mode
Counter Mode
Window Mode
Registers for Timer/Counter 3 Circuit
Window Mode Timing Chart
Configuration of Timer/Counter3
Capture mode
TCIF4
Registers for Timer 4 Circuit
TCR4
PDO Mode
PWM Mode
12 TCC/WDT & Prescaler
TC4 Interrupt
Reset and Wake-up
Reset
13 I/O Ports
Wake-up from Sleep Mode
Wake-up from Idle mode
All interrupt
Summary of the Initialized Values for Registers
Address Name Reset Type Bit
SCR
Bit Microcontroller Register Bank
TC2D9 TC2D8
Register Bank
Bit Microcontroller General Purpose Registers
Previous value before reset
Reset Type
Status of RST, T, and P of Status Register
Interrupt
Controller Reset Block Diagram
Summary of Maximum Operating Speeds
Oscillator
Oscillator Modes
Crystal Oscillator/Ceramic Resonators Crystal
740
Oscillator Type Frequency Mode C1 pF C2 pF
EM78P809N
Ext. Clock
Crystal/Resonator-Parallel Mode Circuit
External RC Oscillator Mode
For design reference only
Enwdtb = 0 Enable Enwdtb = 1 Disable
Code Option Register
Code Option Register Word
Cyes = 0 One cycle Cyes = 1 Two cycles
Power-on Considerations
External Power-on Reset Circuit
Customer ID Register
Vdd EM78P809N
Residue-Voltage Protection
Vdd
EM78P809N Rin
Vdd 40KR2
Instruction Set
DEC
Binary Instruction Hex Mnemonic Operation Status Affected
Vss =
Symbol Parameter Condition Min Typ Max Unit
Absolute Maximum Ratings
Recommended Operating Conditions
DC Electrical Characteristics
Ta= 25 C, VDD= 5.0V ± 5%, VSS=
Typical value is based on characterization results at 25C
Ta= 25 C, VDD= 3.0V ± 5%, VSS=
Varef
= selected prescaler ratio
AC Electrical Characteristic
Symbol Parameter Conditions Min Typ Max Unit
Ta=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V
AC Test Input/Output Waveform
Timing Diagram
Package Types
OTP MCU
Pin Count Package Size
Contents III
EM78P809N