Mode Switching Control, Operation Mode, Normal | IBM EM78P809N

EM78P809N

8-Bit Microcontroller

Table 2. Mode Switching Control

Mode Switch		Switch Method		Note
Normal Æ Sleep		Set SIS = 1, execute SLEP instruction

Sleep Æ Normal		/SLEEP pin wake up

Normal Æ Idle		Set SIS = 0, execute SLEP instruction

Idle Æ Normal		Interrupt

Table 3. Operation Mode

	Operation Mode		Frequency		CPU Code		On-chip
	Operation Mode		Frequency		CPU Code		Peripherals
							Peripherals

Reset

Reset

Reset

Signal Clock

Normal	Turn on

Idle

Sleep	Turn off

Fosc

Halt

Fosc

Halt

In NORMAL mode, the CPU core and on-chip peripherals operate in oscillator frequency.

In IDLE mode, the CPU core halts, but the on-chip peripheral and oscillator circuit remain active. IDLE mode is released to NORMAL mode by any interrupt source. If the ENI instruction is set, an interrupt will be serviced first followed by executing the next instruction which is after the IDLE mode is released and the interrupt service is finished. If the ENI instruction is not set, the next instruction will be executed which is after the IDLE mode start instruction. IDLE mode can also be released by setting the /RESET pin to low and executing a reset operation.

In SLEEP mode, the internal oscillator is turned off and all system operation is halted. SLEEP mode is released by /SLEEP pin (level sensitive or edge sensitive can be set by System Control Register (SCR) bit 0 (REM)). After a warm-up period, the next instruction will be executed which is after the SLEEP mode start instruction. SLEEP mode can also be released by setting the /RESET pin to low and executing a reset operation. In level sensitive mode, the /SLEEP pin must be confirmed in low level before entering SLEEP mode. In edge sensitive mode, SLEEP mode is started even when the /SLEEP pin is in high level.

Table 4. Wake-up Methods

	SLEEP Mode	IDLE Mode	NORMAL
Wake-up Signal	R5 (SIS) = 1+SLEP	R5 (SIS)= 0 + SLEP	Mode
	Instruction	Instruction	R5 (SIS)=(*)

1.Individual interrupt source in IMR1, IMR2

2.WDT interrupt request

3./INT0

4.ENI instruction is not executed

No effect

(**)

1.Wake-up

2.Jump to the next instruction or enter IDLE mode

No effect

(**)

28 •	Product Specification (V1.0) 07.26.2005

(This specification is subject to change without further notice)

Image 32

IBM EM78P809N manual Mode Switching Control, Operation Mode, Normal

Contents

EM78P809N DOC. Version Elan Microelectronics Corporation Contents Specification Revision History CPU Bit Microcontroller Applications „ General purpose Pin Assignment OTP Programming Pins Functional Block Diagram Function Description Operating Registers Tbktc R1/TCC − Time Clock /Counter Address 01h R2/PC − Program Counter & Stack Address 02h R3/SR − Status Register Address 03h Bit 7 ~ Bit 6 RBS1 ~ RBS0 R-Register page selectBit 5 Not used RBS1 RBS0 General Purpose Register Bank Address 20H ~ 3FH Bit 0 C Carry flag R4/RSR − RAM Select Register Address 04hGRBS1 GRBS0 SIS = 0 Idle mode SIS = 1 Sleep mode PORT6 − Port 6 I/O Data Register Address 06hPORT7 Port 7 I/O Data Register Address 07h PORT8 − Port 8 I/O Data Register Address 08h TC4CR Timer/Counter 4 Control Register Address 0Bh TC4S = 1 StartTC4FF1 TC4FF0 TC4CK2 TC4CK1 TC4CK0 Bit Microcontroller TC4D − Timer 4 Data Buffer Address 0Ch ISFR1 − Interrupt Status Flag Register 1 Address 0Eh Bit 7 TC3CAP Software capture control TC3CAP =TC3S = 1 Start TC3CAP TC3S TC3CK1 TC3CK0 TC3M TC3DB − Timer 3 Data Buffer B Address 07h TC2M = 1 Window modeBit 7 ~ Bit 6 ADD1 ~ ADD0 AD low 2-bit data buffer TC2S = 1 Start Adcr − AD Control Register Address 0Bh TC2DH − Timer 2 Data Buffer High Byte Address 09hTC2DL − Timer 2 Data Buffer Low Byte Address 0Ah Bit 3 ADP AD power control Bit 7 ~ Bit 0 ADE7 ~ ADE0 AD input pin enable controlAdic − AD Input Pin Control Address 0Ch Addh − AD High 8-bit Data Buffer Address 0Dh Bit 7 TEN Keytone enable control TEN = 0 Disable TEN = 1 EnableBit 3 Tbten Time Base Timer Enable Control Bit Microcontroller Tbktc − TBT/Keytone Control Address 0Eh Bit 3 Uinven Enable Uart TXD and RXD port inverse output Uinven = 0 Disable TXD and RXD port inverse outputUinven = 1 Enable TXD and RXD port inverse output Bit 4 ~ Bit 2 BRATE2 ~ BRATE1 Transmit Baud Rate Select Even = 0 Odd parity Even = 1 Even parity Bit 5 PRE Enable parity additionBit Microcontroller URS − Uart Status Register Address 07h Bit 2 EDS Data shift out edge select EDS = 0 Rising edge EDS = 1 Falling edgeSMP Dcol BRS2 BRS1 EDS Dord WBE Transfer Mode SPIC2 − SPI Control Register 2 Address 06hSpid SPI Data Buffer Address 07h SPID7 SPID6 SPID5 SPID4 SPID3 SPID2 SPID1 SPID0 PLE7x = 1 Disable P7x pull low PLC1 Pull Low Control Register 1 Address 0BhPHC2 − Pull High Control Register 2 Address 0Ch PLC2 − Pull Low Control 2 Address 0Dh Special Purpose Registers AccumulatorControl Register Bit 7 Wdto WDT output select Bit Microcontroller IOC6 ~ IOC9 − I/O Port Control Register Intcr − INT Control Register Address 0BhBit 2 Reserved INT1ES = 0 Rising edge INT1ES = 1 Falling edge INT Pin Secondary Enable Condition Function Pin External InterruptAdoscr − AD Offset Control Register Address 0Ch Edge IMR2 − Interrupt Mask Register 2 Address 0Fh Uerrie Urie Utie Tbie EXIE1 TCIE0 CPU Operation Mode Registers for CPU operation modeRbank Register Bank bits 7, 6 of R3, R/W Read/Write Rbank Normal Mode Switching ControlOperation Mode Registers for AD Converter Circuit AD Converter→ Don’t care → Interrupt request flag will be recorded Conversion Time ADC Data RegisterSampling Time Max. Frequency Max. Conversion Rate per Bit Time Base Timer and Keytone GeneratorADCK10 Tone Output Pin Timing Chart Rbank Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit Uart Universal Asynchronous Receiver/TransmitterRegisters for Uart Circuit Uart Mode Data Format in Uart Transmitting Receiving Registers for the SPI Circuit SPI Serial Peripheral InterfaceBaud Rate Generator Shift Direction and Sample Phase Transfer ModeBit Transmit Mode Serial Clock Bit Microcontroller Bit Receive Mode Bit Transmit/Receive Mode SCK pin Multiple Device Connect /SS Rbank Address Name Bit 7 Bit 6 Bit Timer/CounterRegisters for Timer/Counter 2 Circuit Window Mode Timer ModeCounter Mode Window Mode Timing Chart Registers for Timer/Counter 3 Circuit Capture mode Configuration of Timer/Counter3 Registers for Timer 4 Circuit TCIF4 PDO Mode TCR4 TC4 Interrupt PWM Mode12 TCC/WDT & Prescaler 13 I/O Ports Reset and Wake-upReset All interrupt Wake-up from Sleep ModeWake-up from Idle mode Address Name Reset Type Bit Summary of the Initialized Values for Registers Bit Microcontroller Register Bank SCR TC2D9 TC2D8 Register Bank Previous value before reset Reset TypeStatus of RST, T, and P of Status Register Bit Microcontroller General Purpose Registers Controller Reset Block Diagram Interrupt Oscillator Oscillator ModesCrystal Oscillator/Ceramic Resonators Crystal Summary of Maximum Operating Speeds Oscillator Type Frequency Mode C1 pF C2 pF EM78P809NExt. Clock 740 External RC Oscillator Mode Crystal/Resonator-Parallel Mode Circuit Enwdtb = 0 Enable Enwdtb = 1 Disable Code Option RegisterCode Option Register Word For design reference only Power-on Considerations External Power-on Reset CircuitCustomer ID Register Cyes = 0 One cycle Cyes = 1 Two cycles Residue-Voltage Protection VddEM78P809N Rin Vdd EM78P809N Instruction Set Vdd 40KR2 Binary Instruction Hex Mnemonic Operation Status Affected DEC Symbol Parameter Condition Min Typ Max Unit Absolute Maximum RatingsRecommended Operating Conditions Vss = Typical value is based on characterization results at 25C DC Electrical CharacteristicsTa= 25 C, VDD= 5.0V ± 5%, VSS= Ta= 25 C, VDD= 3.0V ± 5%, VSS= Varef AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=- 40C ~ 85 C, VDD=5V ± 5%, VSS=0V = selected prescaler ratio Timing Diagram AC Test Input/Output Waveform Pin Count Package Size Package TypesOTP MCU Contents III EM78P809N