82540EP — Networking Silicon
6Datasheet
2.3 PHY Specific Features
Features Benefits
Integrated PHY for 10 /100/1000 Mbps full and half
duplex operation • Smaller footprint and lower power dissipation
compared to multi-chip MAC and PHY solutions
IEEE 802.3ab Auto-Negotiation suppor t • Automatic link configuration including speed,
duplex, and flow control
IEEE 802.3ab PHY compliance and c ompatibility • Robust operation over the installed base of
Category-5 (CAT-5) twisted pair cabling
State-of-the-art DSP architecture implements digital
adaptive equaliza tion, echo cancel lation, and cross-
talk cancellation
• Robust performance in noisy environments
• Tolerance of common electrical signal
impairments
PHY ability to automatically detect polarity and cable
lengths and MDI versus MDI-X cable at all speeds • Easier network installation and maintenance
• End-to -end wiring tolerance
Features Benefits
Transmit and receive IP, TCP and UDP check sum off-
loading capabilitie s • Lower CPU utilization
Transmit TCP segmentation • Increased throughput and lower CPU utilization
• Large send offload feature ( in Microsoft*
Windows* XP) compatible
Advanced packet fil tering
• 16 exact matched packets (unica st or multicast)
• 4096-bit hash filter for multicast frames
• Promiscu ous (unicast and multicast) transfer
mode support
• Optical filtering of invalid fr ames
IEEE 802.1q VLAN support with VLAN tag insertion,
stripping and packet fi lte ri ng f or up to 409 6 VLA N tag s • Ability to create multiple virtual LAN segmen ts
Descriptor ring management hardwa re for transmit
and receive
• Optimi zed f etc hing and writ e-bac k mech anis ms f or
efficient syst em memory and PCI b andwidth
usage
16 KByte jumbo frame support • High throughput for large data transfers on
networks supporting jumbo frames
Interrupt coalescing (multiple packets per interrupt) • Increased throughput by reduc ing interrupts
generated by transmit and receive operat ions