82540EP — Networking Silicon
24 Datasheet
Figure 4. PCI Bus Interface Input Timing Measurement Conditions
V
TH
V
TL
V
TEST
PCI_CLK
T
SU
V
TEST
Input V
MAX
V
TEST
V
TL
V
TH
Input
Valid
T
H
Table 16. PCI Bus Interface Timi ng Measuremen t Conditions
Symbol Parameter PCI 66 MHz
3.3 v Unit
VTH Input measurement test vo ltage (high) 0.6*VCC V
VTL Input measurement tes t voltage (low) 0.2*VCC V
VTEST Output measurement tes t voltage 0.4*VCC V
Input signal slew r ate 1.5 V/ ns
Figure 5. TVAL (max) Rising Edg e Test Loa d
10 pF
25Ω
Pin Test
Poin
t
1/2 inch max.