Additional Device Features, Technology Features | Intel 82540EP

82540EP — Networking Silicon

2.6	Additional Device Features

	Features		Benefits

	Four activity and link indication outputs that directly	• Link and activity indications (10, 100, and 1000
	drive LEDs		Mbps) on each port

		• Software definable function (speed, link, and
	Programmable LED functionality		activity) and blinking allowing flexible LED
			implementations

	Internal PLL for clock generation can use a 25 MHz	• Lower component count and system cost
	crystal	• Lower component count and system cost
	crystal

	JTAG (IEEE 1149.1) Test Access Port built in silicon	• Simplified testing using boundary scan

		• Reduced number of on-board power supply
	On-chip power control circuitrya		regulators
	On-chip power control circuitrya	• Simplified power supply design in less power-
		• Simplified power supply design in less power-
			critical applications

	Four software definable pins	• Additional flexibility for LEDs or other low speed
	Four software definable pins		I/O devices
			I/O devices

	Supports little endian byte ordering for both 32 and 64
	bit systems and big endian byte ordering for 64 bit	•	Portable across application architectures
	systems

	Two or three-pair cable downshift	•	Supports modular hardware accessories

	Provides loopback capabilities	•	Validates silicon integrity

	Minimal ballout change from the 82540EM	•	Pin Compatibility

a.If applying the “low-power” EEPROM setting for the 82540EP chip, then only external voltage regulator circuits should be used instead of the on-chip power control circuitry

2.7Technology Features

	Features		Benefits

	196-pin Ball Grid Array (TFBGA) package	•	15 mm2 component making LOM designs easier
	Pin compatible with 82551QM and 82540EM	• Enables 10/100 Mbps Fast Ethernet or 1000 Mbps
	Pin compatible with 82551QM and 82540EM		Gigabit Ethernet implementations on the same
	controllers		Gigabit Ethernet implementations on the same
	controllers		board with only minor stuffing option changes
			board with only minor stuffing option changes

		• Offers lowest geometry to minimize power and
	Implemented in 0.15u CMOS process		size while maintaining Intel quality reliability
			standards

	Operating temperature: 0° C to 70° C (maximum)
	operating temperature	•	Simple thermal design
	Heat sink or forced airflow not required	•	Simple thermal design
	Heat sink or forced airflow not required
	65° C to 140° C storage temperature range

	PCI Signaling: 3.3 V (5 V tolerant) PCI signaling
	Typical targeted power dissipation:
	• 1.38W @ D0 1000 Mb/s	•	Lower power requirements for mobile applications
	• 386mW @ D3 100 Mb/s (wake-up enabled)
	• <20mW @ D3 wake-up disabled

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Datasheet

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Intel 82540EP manual Additional Device Features, Technology Features

Contents

82540EP Gigabit Ethernet Controller Revision April Datasheet Date Revision 82540EP Networking Silicon Contents 82540EP Networking Silicon Introduction RX MAC MdioTX MAC Acpi LED Product Code Document ScopeReference Documents 82540EP Networking Silicon Features Benefits PCI FeaturesMAC Specific Features Application flexibility for LAN on Motherboard PHY Specific Features HostOffloading Manageability Features A server management processor Additional Device Features Technology Features Symbol Type Name and Function Signal Type DefinitionsPCI Address, Data and Control Signals PCI Bus Interface IRDY# STS PARFRAME# STS TRDY# STS System Signals Arbitration SignalsInterrupt Signal Error Reporting Signals Impedance Compensation Signals Eeprom and Serial Flash Interface SignalsPower Management Signals SMB Signals Other Signals Miscellaneous SignalsLED Signals XTAL2 AnalogXTAL1 Digital Supplies Test Interface SignalsPower Supply Connections Analog Supplies GND Control SignalsGround and No Connects CTRL15 Absolute Maximum Ratingsa Absolute Maximum RatingsRecommended Operating Conditions Recommended Operating Conditions a Sheet 1 Power Specifications D0a DC SpecificationsDC Characteristics Recommended Operating Conditions a Sheet 2 Power Specifications Complete Subsystem Power Specifications D3coldPower Specifications Dr Uninitialized = V SS O CharacteristicsSymbol Parameter Condition Min Typ Max AC Characteristics PCI Bus Interface Clock Parameters Timing Specifications PCI Bus InterfaceSymbol Parameter a PCI 66 MHz PCI 33 MHz Units Min Max Tcyc Symbol Parameter PCI 66MHz PCI 33 MHz Units Min Max PCI Bus Interface Timing Parameters VTH Symbol Parameter PCI 66 MHz UnitPCI Bus Interface Timing Measurement Conditions VTL Inch max Point 50 pF PinInch max Point 1kΩ 10 pF Rise and Fall Times Link Interface TimingEeprom Interface Yyww Device Identification82540EP Product Name Date Code Datasheet Package Information Symbol Parameter Value at specified airflow m/s Units Thermal SpecificationsThermal Characteristics Thermal resistance, junction-to-ambient Pinout Information SMB Signals Power Management SignalsImpedance Compensation Signals Eeprom and Serial Flash Interface Signals Digital Power Signals PHY SignalsTest Interface Signals Analog Power Signals Signal Name Pin Grounds and No Connect SignalsSignal Names in Pin Order Sheet 1 Lanpwrgood Smbclk M66EN REQ# CBE3# Signal Names in Pin Order Sheet 2RST# SMBALRT# CLKRUN# Smbdata GND CLK VIO TRDY# Zpcomp Signal Names in Pin Order Sheet 3IRDY# FRAME# CBE2# GND PAR PERR# GNT# Signal Names in Pin Order Sheet 4STOP# INTA# DEVSEL# Zncomp CBE0# PCIAD5 GND PCIAD1 Clkview FLCE# Eesk Signal Names in Pin Order Sheet 5CBE1# PCIAD8 PCIAD6 PCIAD3 PCIAD2 Eecs GND Flso Eedi Signal Names in Pin Order Sheet 6PCIAD9 PCIAD7 PCIAD4 Vddo P12 Visual Pin Reference C D E F G H J K L M N P